The Design And Realization Of Low-rate Bit Error Tester

Bit Error Rate is very valuable and important to detect, analyze, and troubleshoot digital communication devices and communication channels, based on which to evaluate the performance of communication transmission devices or the quality of a system's transmission. Bit Error Rate Tester (BERT) widely applies in the fields of Telecom, Mobile, Unicom, Electric Power, Netcom, Tietong, Military, and so on. It is usually used to field opening, checking and accepting, exception diagnosing, field maintenance of Access Network, Transmission Network, Optical Communication or Data Communication system.The BERTs which on the market at present, have many functions and high cost that the users don't want. According to users' expectations, the designation and development of The Low-Speed BERT is based on Single Chip Micycoco, which meeting the need of the Electric Power carry wave line. The BERT is capable of testing the bit error performance of the channel carrying 2048Kbps and N×64Kbps speed data stream, offer the function of error insertion, optional test patterns and RS-232 communication interface.Based on 8 bits Single Chip Micycoco system, the BERT can interface with 75 Ω asymmetry coax and 120 Ω symmetry twisted-pair lines, and has resolved the key problems of bit error statistics, bit error test and bit error rate calculation. It can provide programmable pseudorandom pattern and any repetitive pattern up to 32bits, and can insert software programmable bit error at fixed intervals or random intervals.Based on the economical demand and the low speed communication line need, the device makes a choice to use Single Chip Micycoco combined with overseas Very Large Scale Integrated (VLSI) circuit, which are all high efficiency and low power chips, operated with +5V single power level. The designation makes the BERT have small volume, low cost, portability, steady performance and low power consumption merits. With debugging and running of the tester, the result indicates it can reliably be operated, obtains the test parameters user demands, and has the advantage at the rate of performance and cost compared with the congeneric bit error tester.