Design And Implementation Of A Digital Filter For Sigma Delta Adc

ΣΔADC is an analog-digital converter which develops greatly in recent years. It improves the precision of conversion by increasing the sampling frequency to adapt the developing trend of high speed and high level in integration circuits'field, and it keeps high-advantage in analog-digital field. Digital filter takes the largest area inΣΔADC, ordinary more than 80%. Thus it's necessary of us to do more research to cut down the filter's weight.This article deeply analyses the principle and noise sources ofΣΔADC, particularly the composition of the filter inΣΔADC. The author broaches single-stage comb filter structure to reduce the size of the filter greatly but keep the precision by means of increasing sampling frequency and level of modulation. And the structure of variable down-sampling rate which changes in different frequency input is also proposed for the serious attenuation in band of single-stage comb filter.In this paper, the author verifies the rationality of this structure through modeling and simulation by use of Matlab. When the frequency input beyond the half frequency of pass-band around, the SNR of system doesn't falls significantly and the precision only reduces approximate 1.5 bit. Finally, after the ASIC flow, the synthesis, placement and routing, the filter actually occupies approximate 0.01 mm2 in the 0.25μm process, only 50% of the overall area ofΣΔADC.。The paper only supplies the reference for the design ofΣΔADC with low cost and high precision.