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Design And Implementation Of High Performance Transceiver Logic Control System

Posted on:2011-03-16Degree:MasterType:Thesis
Country:ChinaCandidate:Z J LiuFull Text:PDF
GTID:2178360308461424Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
The thesis presents the work of the project of RF Universal Instrument Funded by Department of Electronic Information Industry Development. The RF Universal Instrument hardware can be build up with RF modulator, broadband frequency synthesizer, RF system logic controller, baseband signal processor, center processor and PXI backplane. Transceiver RF subsystem hardware platform is a bottleneck of RF equipment which supporting high precision, large dynamic range and broadband RF spectrum.Transceiver logic control part is the core of RF equipment, and is very important to realization.Author mainly design and implemente PCI bus interface, FPGA dynamic configuration and RocketIO high speed serial communication module.Work ranging from needs analysis, outline design, detailed design,FPGA logic design, simulation and debugging. Provides transmission and control links with high throughput and low-latency. Load the program to FPGA dynamically.The development work described for RF subsystem provides an important guarantee for success.The contents of this thesis are described as follows:1,Introduce the origin of the task and the meaning of the research.2,Introduce the principle of FPGA and Xilinx's latest features of V5 series FPGA chips and learn the FPGA development process and design skills.3,The whole design scheme of the RF system logic controller is introduced.Accomplish the requirements analyzing of the RF Universal Instrument, propose implementation of the program based on dual FPGA chips. 4,Accomplish the design and realization of the RF Universal Instrument.The design part includes structure drawing of the chip functions, communication interface between modules and the detail.5,Simulate the key modules of the system including introduction to the process of simulation platform building and then analyze the simulation results.In the end, test the key modules and give the reports.6,Summarize the works of this thesis and make an expectation.
Keywords/Search Tags:pci, rocketio, fpga, dynamic down load
PDF Full Text Request
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