Research Of FPGA Dynamic Reconfiguration In High-speed Serial Connection System

High-speed serial connection technology has taken place of parallel connection technology being the mainstream technology. FPGA(Field Programmable Gate Arrays) has the advantage of high parallel efficiency, more available resources, repeatable programming and low cost, so that it is used in high-speed serial connection system more than it was. Sometimes high-speed serial system needs more resources, more flexible ways of configuration and lower costs than other FPGA systems. However, one single FPGA could not satisfy. So after achieving the expected function what you expected, thinking about how to cut the resources utility and make the configuration of this system more flexible is very important.High-speed serial connection system is based on the serial connection transceiver unit and high-speed serial connection protocol. This protocol needs to achieve the initialization of transceiver, channel bonding, encoding, decoding and error detection. Achieving the protocol with the help of FPGA will speed up the whole circuit, and the whole system can operate at a higher speed.Reconfiguration technology based on FPGA can reconfigure the part of reconfigurable zone of FPGA. Because this technology allows the configuration document storing in the external high capacity CF card, the capacity of configuration document won't be limited. What's more, there is only a reconfigurable module in the FPGA, and other configuration documents stores in the CF card, so that it can lower the utility of hardware resource and cost.This paper uses the reconfiguration technology of FPGA in the high-speed serial connection system and wants to compare the project of reconfiguration with one of non-reconfiguration in quantitative analysis. At first, this paper researches the theory of serial connection system, and then designs the protocol of point-to-point serial communication. The third chapter states every module in the project, does simulation with Modelsim and verifies the protocol with ChipScope. In the fourth chapter, an image-reconfiguration high-speed configurable system is designed to verify whether the protocol can work in the normal system or not. In the fifth chapter a non-reconfigurable contrast experiment is designed to implement the same function, and compare in the attributes of max frequency and ratio of resources with the reconfigurable system. In the end, a summary of the merits and faults of reconfigurable serial connection system is given to the correlated reconfigurable design.