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The Design And Implement Of USB2.0 Host Controller For The Mass Storage Device

Posted on:2011-11-21Degree:MasterType:Thesis
Country:ChinaCandidate:L WangFull Text:PDF
GTID:2178360305971975Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
After the standards of USB1.0, USB1.1 and USB2.0 have promoted one after another, the USB connection technology developed quickly by its nimble, stable, low cost. At present, the mass memory equipment that has USB connection is the one of most widespread applications of USB connection technology. Under this background, designing and realizing in view of the mass memory equipment's USB2.0 main engine controller this has very important significance.This topic was designing and realizing the USB2.0 main engine controller on FPGA by hardware descriptive language VHDL. First analyzed has designed the USB2.0 main engine controller's background and significance. Then introduced the standard which the USB2.0 main engine controller needs, including the USB2.0 standard, UTMI standard, USB Mass Storage Class standard, SCSI set of instructions and FPGA principle of design and method. After having understood correlation theories has analyzed the main engine controller's difference from USB equipment controller's function, mainly aims at the USB main engine controller and manages these two aspects to the mass memory equipment's enumeration and visit to equipment's FAT filing system's to carry on the elaboration. After having known the USB main engine controller's principle of work and the function, started in view of mass memory equipment's USB2.0 the main engine controller's IP nucleus design. First has built the hardware platform, and has given the design overall frame. Afterward realized to each module has made the detailed introduction. Finally carried on the analysis to the partial module's simulation result, the simulation result has met the design requirements.This design's hardware platform is made by three parts: FPGA chip Xilinx Corporation Spartan-3 series XC3S1000-FT256-4-C, physical level chip CYPRESS Corporation's CY7C68000 and Tristar Corporation's FLASH the chip K9F5608U0B. The USB2.0 main engine controller's design mainly divides into four modules: UTMI module, master control module, FLASH interface module and MCU interface module. The UTMI module connects the USB2.0 main engine controller and the physical level chip interface circuit, has realized to the equipment working pattern and speed transformation; The master control module is responsible for a USB package of receiving and dispatching as well as to transmits business's control, in addition has also realized to equipment's enumeration and the FAT filing system's management; FLASH interface module is responsible to FLASH carries on the read-write operation; The MCU interface module has provided the main engine controller and microprocessor's connection.USB2.0 the main engine controller IP nucleus has not only realized the USB transmission basic function, but also the innovative improvement USB system design's hierarchical structure, realized the main line enumeration and FAT filing system's management these two parts with the hardware description language, has realized the USB driver software hardening, strengthened the USB2.0 main engine controller's in embedded system application independence enormously.
Keywords/Search Tags:USB 2.0 Host Controller, Mass-Storage Device, Enumeration, FAT File System
PDF Full Text Request
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