The Design Of USB2.0 Host Controller (ULPI) Baded On FPGA

In the process of USB protocol standard's development, USB2.0 interface has occupied the most of electronic consumer market and has been widely applied in computer, communication and consumable electronic products. As to a system of USB2.0, the most of host controllers are integrated in the motherboard of PC in order to communicate with peripheral equipments. Above all, to implement embedded USB2.0 host controller without a PC has broad application prospect.The design of USB2.0 host controller in this paper fully supports USB2.0 protocol, UTMI protocol, ULPI protocol and Mass Storage Class Specification. On the basis of analysis of controller's function, this paper has established the system function framework. This design mainly divides into four modules: master control module, dual ram module, ULPI module and MCU interface module. The master control module is the core module in this design. It is responsible for a USB package of patching and dispatching as well as to transmission business's control. In addition, it has also realized equipment's enumeration and the FAT filing system's management. The function of dual ram module is to realize data buffering. The ULPI module realizes the connection between host controller and front-end PHY chip and the MCU module supply the interface between host controller and back-end MCU. On the basis of module division, this paper has specifically analyzed and designed on each module.The innovation point of this design is to harden the host driver on the basis of the realization of the fundamental function of USB host controller. That is to realize the function of enumeration and the FAT filing system's management with the hardware description language. It enhances the independence and portability of host controller. We use mature 51 IP core in laboratory as MCU to assist host controller to communicate with device and finish reliable verification through its serial port.The hardware platform of this design is made up of Xilinx Virtex-Ⅱseries FPGA in laboratory and daughter board. As to daughter board, this design has finished the work of drawing, welding and debugging to its PCB. The core chip of daughter board adopts the PHY chip ISP 1504, which supports the design of USB host controller. This chip supports ULPI protocol, so it can reduce the number of interface signals between USB2.0 link layer and PHY layer and simplify the connection requirement of high speed USB.In the end, the paper has detailed account to the verification method. Then this paper has finished simulation in the software of ISE and MODELSIM and has accomplished the verification work by downloading code on FPGA development board and serial debug software. By analysis of simulation pictures and data from serial port, the design could meet the expected requirement.