Crucial Technology Research On High Performance Parallel Multiplier

In the design of integrated circuit field, Various of microprocessors type play a very important role in entire chip. As the day passing, people have increasingly high performance of microprocessor, so every part of microprocessor should be improved. Multiplier is a core components of microprocessor has become the measure of modern high-performance computer and digital signal processor. Multiplier design and implementation has a direct impact on the performance of microprocessors. At home and broad, Study on improving the performance of multiplier is an important issue of high performance microprocessor design.This paper has a in-depth study on Multiplier which is the core components of microprocessor. It focuses on the optimization of algorithms and logic circuit design of multiplier .In algorithms, Proposed re-design of partial product generating circuit method and show some shortcomings of partial product compressor array. Proposed a way to reduction partial product compressor depth and reduce the implementation complexity of circuit and layout .Finally achieved two different structure of multiplier. The performance of two different structures of multiplier is better than the olds. Reached the purpose of optimization design and improving the multiplier performance.