Design And Implementation Of High Speed Bus Bridge In B3G System

Recently users' needs ofthen wireless communications orientateb roadband, personality, intelligence and mobile, which promotes growth of more advanced technologies such as Intelligent Antenna, Multicarrier Modulation, Software Defined Radio(SDR),MIMO space-time code and so on. It is a challenge that how to provide a more eficient, flexible and broader interactive bus architecture with many handlings and controlling elements in the broadband wireless communication systems,and provide a more efficient bus between MAC, RLC and PHY, reduce the cost and induce the efficiency. The major achievements are outlined as follows.(1) The paper imports PCI interface as Data Exchange Bridge of MAC and protocol processing module, and realize high speed parallel data transmission.(2) The adoption of RocketIO high speed serial interface and the use of FPGA with Rocket IO core combine FPGA processing function with high data transmit, and induce the performance and develop efficiency.(3) The paper designs and realizes the high speed bus bridge with the adaptation of PCI and RcoketIO.(4) The paper imports SoC frameware in FPGA. The adaptation of SoC is more convenient to the system debug without increasing the cost .