| With the rapid development of artificial intelligence,industries in today’s society are constantly adjusting and upgrading,moving towards a more intelligent and brain-like direction.An increasing number of technological and industrial products are empowered with human brain-like thinking capabilities through specific neural network algorithms.However,the existing hardware architecture dominated by CMOS(Complementary Metal Oxide Semiconductor)exhibits significant disadvantages in terms of neural network weight adjustment.Therefore,there is an urgent need for a device that is more suitable for implementing neural networks.Memristors,with their unique resistance characteristics,are considered one of the devices that best embody the neural morphological working mechanism.However,the existing memristor models cannot keep up with the latest device working frequencies in the industry,hindering the circuit simulation of memristors at high-frequency hertz.At the same time,most existing memristor-based neural morphological circuits use CMOS transistors as peripheral circuits,combining memristor artificial synapse characteristics and utilizing their continuous conductance change properties to simulate the neural morphological learning process.This working mechanism results in high power consumption,complex circuit structures,and a lack of standardized quantification processes,failing to reflect the advantages of memristors in terms of simple digital logic structures and low power consumption.To address the lack of high-frequency simulation models for memristors and the shortcomings of existing memristor neural morphological circuits,this study maps the neural morphological working mechanism onto memristor-based digital logic gate circuits,accomplishing the following work:(1)First,TiO2 was selected as the memristor’s intermediate layer,and TiO2-based memristors were fabricated using methods such as spin coating and magnetron sputtering.Next,mask templates for single and crossbar array structures were designed,and various electrical characteristics of the TiO2 memristors were tested.The devices exhibited good stability and consistency in their I-V characteristics and resistance retention properties during multiple cycles of the same polarity voltage test,enabling long-term stable data storage.In both DC and continuous pulse tests,the TiO2 memristors demonstrated favorable conductance modulation characteristics.(2)Based on the electrical characteristics testing of TiO2 memristors,HP,Simmons tunnel potential barrier,TEAM and VTEAM memristor simulation models are introduced to analyze the advantages and disadvantages of the models and their applicable ranges.The VTEAM(Voltage Threshold Adaptive Memristor)model is selected as the simulation model for subsequent circuit design.In addition,by analyzing the relationship between magnetic flux and charge in the physical definition of memristors,a memristor emulator that can still maintain memristor I-V characteristics at megahertz frequencies is designed.The emulator has been verified by Cadence Pspice software simulation and solves the problem that current memristor emulator models lose memristor characteristics and become linear resistors at high frequencies.(3)Based on the stable resistance retention and I-V cycle characteristics exhibited by TiO2 memristors,a hardware model of high-frequency memristors is designed through Verilog-A language.A neural morphology associative learning circuit is designed with MOS transistors as peripheral circuits and memristor resistance as the performance form,which successfully simulates the classical "Pavlov’s dog" conditioned reflex experiment in biology.On this basis,the circuit redundancy is optimized,and the VTEAM model is used to fit the memristor experimental data.Based on the TiO2 memristor basic logic gate circuit,a digital neural morphology circuit based on TiO2 memristors is constructed,which fully simulates the process of associative learning memory and forgetting of "Pavlov’s dog". |
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