Design Of Equalization Circuit For High Speed Serial Signal Transmission In HDMI

With the development of Multimedia technology,the wide application of high-speed serial Interface represented by High Definition Multimedia Interface(HDMI)greatly meets people’s demand for high quality audio and video.However,non-ideal effects such as attenuation and reflection in wired transmission channels destroy the integrity of the signal and limit the transmission rate of the signal.The high speed serial link must compensate the attenuation distortion of the signal to recover the quality of the receiving end,so the research of equalization circuit and impedance calibration technology is of great significance.This paper mainly studies the equalization circuit and impedance calibration technology of HDMI receiver,introduces the signal integrity problem of high-speed serial link,analyzes and discusses the common equalization circuit and bandwidth expansion technology.In order to reduce the influence caused by the change of HDMI channel state and reduce the intersymbol interference,a 3 Gbps adjustable equalization circuit and impedance calibration circuit are designed.The Continuous Time Linear Equalizer(CTLE)structure is used in the equalization circuit.The pre-stage CTLE adopts the two-stage amplifier structure with adjustable active inductance as the load to improve compensation gain,expand bandwidth,and reduce area and power consumption.The post-stage CTLE utilizes a variable resistance array to achieve adjustable low-frequency gain.The overall equalizing circuit can adjust the gain of high and low frequency,avoid undercompensation and overcompensation,and improve the adaptability of the circuit to HDMI cables with different attenuation coefficients.The impedance calibration circuit uses the dichotomy method to find the modified resistors of different weights,and determines whether they are incorporated into the resistance network by the output results of the comparator.Moreover,the 50 Ω matching resistors can be accurately modified by the positive and secondary resistance correction modules,with high calibration accuracy.In this paper,the equalization circuit and impedance calibration circuit are designed based on TSMC 0.11μm CMOS technology,and the layout design and pre-simulation and post-simulation verification are completed.The post-simulation results show that the low-frequency gain of the designed equalization circuit is adjustable by 8 stages in the range of 0.72 ～18.12 dB,and the highfrequency gain is adjustable by 4 stages in the range of 24.1～37.3 dB.After the channel attenuation of 18.65 dB@1.5 GHz,the opening d egree of the eye image is above 0.77 UI,and the horizontal direction of the eye image is about 0.25 UI.The impedance calibration circuit can provide the best correction resistance value of 49.75Ω,achieving a correction accuracy of 0.5% and a correction range of ±30%.The overall layout area of the circuit is 567μm * 623μm,and the total power consumption is about 19.85 mW.