| Silicon carbide(SiC),as a typical representative of the third-generation semiconductor materials,has the advantages of high critical breakdown electric field,high thermal conductivity,and high electron saturation rate.It has natural application advantages and huge application potential in high-power scenarios.SiC Vertical Double Diffused Metal-Oxide Field Effect Transistor(Silicon Carbide Based Vertical Double Diffused Metal-Oxide Field Effect Transistor,SiC VDMOSFET)is widely used because of its high input impedance,low conduction loss,excellent high temperature and high frequency characteristics.Power grids,high-speed trains,electric vehicles and other fields.However,at high temperature,the electrical parameters of SiC VDMOS will also change,which will affect the stability of the device operation,at the same time,under long-term high temperature gate bias,the SiC-Si O2interface will degrade,and the threshold voltage drift caused by Positive Bias Temperature Instability(PBTI)seriously threatens the reliability of SiC VDMOS.Therefore,it is of great significance to study the temperature characteristics of SiC VDMOS and the degradation mechanism under the influence of PBTI.In this thesis,SiC VDMOS is taken as the research object,the temperature characteristics of its static parameters and the degradation of high temperature gate bias are studied.Based on Silvaco TCAD software,a high temperature model suitable for4H-SiC n-VDMOS considering the interface state is established.The cause of the zero temperature coefficient point is explained;an accelerated aging experimental platform under high temperature gate bias stress is built,and the mechanism of the PBTI effect and the degradation law are studied.The research contents of this thesis mainly include:1.Research on high temperature static characteristics of SiC VDMOS.A high-temperature test platform for the electrical parameters of SiC VDMOS was built to test the output and transfer characteristics of SiC VDMOS(C3M0075120D)in the operating temperature range of 300K~475K,as well as static electrical parameters(threshold voltage,on-resistance)were tested.The test results show that the temperature coefficient of drain current is related to the gate voltage,and a zero temperature coefficient point will appear under certain conditions,which is explained by theoretical analysis.2.A high temperature simulation model based on Silvaco TCAD is established.In order to understand the internal mechanism of the influence of temperature on the electrical parameters of the device,a high temperature model of 1.2 k V SiC VDMOS considering the influence of interface states was established.The internal mechanism of the effect of temperature on the static electrical parameters of the device and the cause of the zero temperature coefficient point are revealed:Coulomb scattering at low gate voltage dominant,making the channel electron mobility exhibit a positive temperature coefficient;at high gate voltage,phonon scattering dominates,making the channel electron mobility exhibit a negative temperature coefficient.In addition,the effect of the interface state density on the zero temperature coefficient point is studied:the increase of the interface state density will increase the temperature sensitivity of the threshold voltage,thereby presenting a larger positive temperature coefficient region.The thermal instability was optimized with a HOf2-Si O2 structure by changing the gate stack material.3.Aging experiment under high temperature gate bias.Two types of SiC VDMOS(C3M0075120D and SCT50N120)were subjected to high-temperature gate bias experiments for 460 h and 10000 s at different gate voltages and temperatures to study the gate degradation mechanism and laws of SiC VDMOS under PBTI stress.The results show that devices from different manufacturers show similar degradation laws:the threshold voltage degradation is more obvious,and the greater the gate stress,the more significant the degradation,and the degradation over time follows a power-law model;temperature has little effect on the degradation results.Parameters such as drain leakage current and gate leakage current are basically not degraded. |