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Study On The Influencing Factors Of Chip Crracking In Chip Peeling And Picking

Posted on:2024-02-07Degree:MasterType:Thesis
Country:ChinaCandidate:Y L LiuFull Text:PDF
GTID:2568307094471574Subject:Mechanics
Abstract/Summary:PDF Full Text Request
Chip packaging,as the next step in the integrated circuit industry,directly determines the performance and reliability of electronic products or devices.The chip peeling and picking is a key process in chip packaging,mainly completing the transfer of a single bare chip from a crystal disk to a circuit board,in order to facilitate subsequent processes.Due to the fact that silicon based chips are made of brittle materials and bonded to the blue film,chip fragmentation and chip back damage are prone to occur during the actual peeling process.Therefore,achieving non-destructive chip peeling is of great significance for reducing packaging costs,improving product yield,and improving device reliability.This article mainly focuses on the research and analysis of chip single ejector pin peeling,and the main research contents are as follows:(1)Based on the working principle of the chip peeling pickup device,this paper briefly summarizes the impact of thimble peeling on chip fragmentation in chip peeling pickup,and summarizes the relevant influencing factors.Based on the plane strain,the mechanical analysis of the chip peeling and picking process is performed to obtain the expressions of the tensile force at both ends of the blue film,the contact force of the ejector pin,and the center bending moment of the chip.The relationship between the interfacial peeling energy release rate and the peeling force,peeling angle,and peeling speed is analyzed.(2)According to the working principle of the chip peeling pickup device,and by simplifying the chip peeling structure,a finite element model is established.The finite element model is verified for mesh independence using Abaqus finite element analysis software,and the maximum principal stress distribution nephogram of the chip is analyzed to obtain the location of the maximum stress value.In order to further study the variation of the maximum principal stress at the center of the chip,the contact force of the ejector pin with the displacement height of the ejector pin,and the peeling area of the chip interface after the ejector pin peeling,laying the foundation for subsequent analysis of the impact of different factors on the maximum principal stress at the center of the chip,and the peeling area of the chip.(3)Based on the analysis of the chip peeling process,three parameters,vacuum pressure,ejector pin diameter,and ejector pin speed,were selected to study the effects of different factors on the maximum principal stress at the chip center,chip peeling area,and ejector pin contact force.By using the orthogonal experimental design method,using the maximum principal stress and peeling area as the test indicators,selecting the level of three test factors to obtain the orthogonal table,and using finite element analysis to obtain the test index values of each parameter combination scheme in the orthogonal table.According to the range analysis method,the primary and secondary order of the influence of three factors on the maximum principal stress and peeling area is studied,and the optimal parameter combination is obtained.(4)By improving the structure of the chip peeling device,a two-stage peeling of the chip is carried out using a combination of a push piece and a thimble.Establish an improved finite element model and conduct simulation analysis to compare the maximum principal stress at the center of the chip before and after the improvement with the chip peeling area,and verify the feasibility of the improved scheme.Based on this,optimize the parameters of the improved scheme by increasing the displacement height to reduce the maximum principal stress at the center of the chip.Based on the optimized displacement height scheme,study the applicable lifting speed range for chip stripping.
Keywords/Search Tags:chip peeling and picking, cohesive zone model, chip cracking, structural improvement
PDF Full Text Request
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