| The Direction of Arrival(DOA)estimation algorithm,as an important application of array signal processing,has seen rapid development in recent years.However,traditional model-based DOA estimation algorithms generally involve complex matrix and iterative operations,and have poor estimation performance in low signal-to-noise ratio conditions.In recent years,deep learning has been widely applied in various fields,and many researchers have applied deep learning methods to DOA estimation,improving DOA estimation performance and effectively increasing computational speed.Meanwhile,it is of great research significance to realize real-time DOA estimation algorithm on FPGA.This article mainly focuses on the research of deep learning-based DOA estimation algorithms and the implementation of algorithms on FPGA.The main work contents are as follows:1.Firstly,this article analyzes the basic framework of the array signal model and neural network-based DOA estimation algorithms.Then,the neural network DOA estimation algorithm using the sparsity of space domain incident signals for feature extraction is studied.In order to realize the DOA estimation algorithm on FPGA,a parallel estimation algorithm based on spatial subset is designed.Through simulation experiments,the DOA estimation algorithm has good estimation performance under low signal-to-noise ratio conditions,and the computation time is lower than traditional MUSIC and Capon algorithms.2.The hardware design of the deep learning-based DOA estimation system is proposed.Based on an 8-element ULA array,the DOA estimation algorithm proposed in this article is designed based on FPGA.This article elaborates on the design ideas of data path and controllers for covariance vector generation module,pseudo-spectrum generation module,pseudo-spectrum zeroing module,and convolutional neural network module.The parallel and pipelined design of modules are fully utilized in the submodule design to reduce computation time.3.Based on Stratix V series FPGA devices,this article conducts comprehensive analysis and verification of the above design,including functional simulation,logic synthesis,resource consumption analysis,timing analysis,and power consumption analysis.Finally,the design in this article completes DOA estimation in 2.783 us at150MHz,and the system’s highest operating frequency is 153.09 MHz.Compared with the implementation of traditional DOA estimation algorithms on FPGA in other literature,the design in this article has a shorter computation time. |
