Research On Digital Predistortion Technology Based On Time Domain Aliasing

With the innovation of wireless communication technology,the future communication system is developing rapidly in the direction of fast transmission rate,low transmission delay,and large working bandwidth.As a key technology in the communication system,digital predistortion(DPD)technology is used to improve the linearity of the power amplifier(PA).The transmission bandwidth required by the current communication system is gradually increasing,which directly leads to the increase of the sampling rate required by the analog-to-digital converter(ADC)in the receiver of the DPD system,which is a huge challenge for the cost and power consumption of the entire system.In this background,this thesis mainly studies the down-sampling digital predistortion technology in wideband system.The main work and innovations of this thesis are as follows:1.The down-sampling pre-distortion technology is analyzed,focusing on a digital pre-distortion technology based on time-domain aliasing.The samples containing the distortion characteristics of the power amplifier are collected through the structure of the digital spectrum sensing feedback receiver,which is used for the modeling and solution of the power amplifier.Based on the Matlab simulation platform,the time domain aliasing is simulated to obtain the frequency domain samples of the power amplifier output,and the time domain aliasing DPD scheme is simulated.The results show that when the baseband signal is 20 MHz 32 QAM,the power amplifier modeling accuracy NMSE obtained by down-sampling 128 times through frequency domain samples can reach-42.64 d B.2.An improved digital spectrum sensing feedback receiver structure is designed to reduce the requirements of single-channel receivers for spectrum sampling frequency and bandwidth.This structure increases the number of low-speed ADC and integrator circuits,and can acquire more frequency domain samples in the same time.On the basis of the original single-channel spectrum sensing feedback receiver,four-channel parallel sampling is adopted to increase the rate of frequency-domain sample acquisition without reducing the ADC sampling rate,and at the same time reduce the frequency of spectrum sampling required by each channel.Through Matlab simulation verification,the improved four-channel time-domain aliasing digital pre-distortion scheme can achieve modeling accuracy comparable to the original scheme when the 40 MHz 16 QAM test signal is down-sampled by 128 times,and its NMSE is-41.96 d B,while the singlechannel spectrum sensing bandwidth is reduced to 1/4 of the original,and the number of single-channel spectrum sampling frequency points is reduced to 1/16 of the original.3.A linearization test platform based on a vector signal generator-vector signal analyzer(VSG-VSA)was built to conduct experimental tests on the time-domain aliasing DPD scheme.Firstly,the Doherty power amplifier operating at 3.5 GHz was tested at 20 MHz and 40 MHz.After correction by the time-domain aliasing DPD scheme,the ACPR of the output signal after down-sampling 128 times pre-distortion can reach below-55 d Bc and-49 d Bc respectively.The multi-channel time-domain aliasing scheme can also achieve considerable pre-distortion performance.Secondly,in order to verify the performance of time-domain aliasing digital predistortion in broadband communication systems,a 100 MHz 64 QAM signal is used for testing.The results show that after timedomain aliasing 32-point DPD correction,sub-Nyquist sampling with a theoretical sampling rate of 19.2 MSPS under 32 times down-sampling,the ACPR of the output signal after predistortion by two schemes can be controlled below-46 d Bc.