Chip Design Of Millimeter-Wave Power Amplifier

Power amplifier is one of the most critical blocks for millimeter-wave（mm-wave）fifth-generation（5G）applications.A high output power and highly efficient power amplifier is desired to reduce the power consumption and to increase the communication distance.To make use of the mm-wave frequency spectrum resource,power amplifier is also needed to achieve broadband performance.The main challenge in designing broadband mm-wave power amplifier is to achieve both broadband gain and wideband output power simultaneously.Based on the existing design method of the broadband matching network,this thesis further analyses the effect of the effective inductance introduced by the center tap on the frequency response of transformer-based balun.Smaller effective inductance results in a better balance of balun,which is conducive to broadband mm-wave circuit design.Additionally,designing formula of interstage matching network is proposed and it is elaborate to avoid matching to the nonlinear impedance region.An ultra-wideband power amplifier in 65nm CMOS process is designed for validation,and it achieves both measured-3d B gain bandwidth and-1d B power bandwidth from 23 to41 GHz,which covers the full 5G FR2 band.The power amplifier achieves 19.7d B peak gain and in-band gain ripple of 1.5d B.At 26/28/29 GHz,it demonstrates 12.5/12.4/12d Bm output 1-d B compression point(P_{1d B})and 14.8/14.8/14.5 d Bm saturated power(P_sat)and 29.1/29.8/23/8%peak power-added-efficiency（PAE）.On top of the evolution toward mm-wave,in addition to improving spectrum bandwidth,the future 5G systems will leverage spectrally efficient complex modulation schemes to maximize the data rates.These modulated waveforms have large peak-to-average power ratio.The power amplifiers need to maintain highly linear responses in a wide power range and achieve a high power-backoff efficiency to enhance the average efficiency of the systems.Load modulation balanced amplifier is potential to achieve broadband efficiency-enhancement at different power-backoff.To improve its linearity,it is needed to integrate an adaptive biasing circuitry.This thesis illustrates the effect of adaptive biasing on amplitude-to-amplitude distortion and efficiency,and proposes a gain flatness enhancement technique based on adaptive biasing circuitry combining variable cross-coupled pair,which not only overcomes the severe nonlinearity due to the compressive behavior,but also without sacrificing efficiency.For verification,a 24-28GHz fully integrated high-efficiency and linear load modulated balanced power amplifier in 65nm bulk CMOS process is presented in thesis.According to the measurement results,the proposed two-stage load modulated balanced power amplifier achieves a measured peak gain of 24.8d B at 26GHz.Besides,it demonstrates P_sat of22.2d Bm,20.1d Bm P_{1d B} and a peak PAE of 30.4%at 27GHz.Meanwhile,the measured PAE at 8-d B PBO from P_sat is 15.0%,which achieves an enhancement ratio of 1.25/3.1in contrast with the ideal class B and class A PA exhibiting a same peak PAE.