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Research And Design Of Key Technologies For Silicon-based Ultra-wideband And Dual-band Low-noise Amplifier

Posted on:2022-12-07Degree:MasterType:Thesis
Country:ChinaCandidate:Z X WangFull Text:PDF
GTID:2568307067986469Subject:Electronic and communication engineering
Abstract/Summary:
In recent years,ultra-wideband(UWB)receiver has been widely used in radar system,satellite and vehicle communication due to its wide bandwidth,high transmission rate and strong anti-interference ability.Low noise amplifier(LNA)is a very important module in the receiver.The sensitivity of the receiver largely depends on the performance of LNA,so its performance is very important.With the development of radar towards low cost and integration,fully integrated on-chip radar system has gradually become a research hotspot.In the field of chip design,silicon based technology has been widely used because of its advantages of low cost,low power consumption and high integration,therefore,using silicon based technology to design low noise amplifier is a valuable research direction.This paper summarizes the research status of silicon-based UWB and simultaneous dual band LNA,points out the shortcomings still existing in the current research of the two LNAs,then gives solutions to these shortcomings,and verifies the effectiveness of these solutions in the design processes of the two LNAs.The first 2-18 GHz ultra wideband low noise amplifier introduced in this paper is designed and taped out in 0.13μm Si Ge Bi CMOS process.The amplifier adopts two-stage cascode cascade structure.At the same time,the load of the two-stage circuit adopts inductive parallel peaking technology to improve the high-frequency gain and gain flatness.The first stage of the amplifier adopts resistive-feedback and emitter degeneration inductive technology to realize the simultaneous matching of noise and broadband input power.When the test results of the first version of LNA are not ideal,many improvements are made.The simulation results of the improved LNA are as follows:in the range of 2-18 GHz,the gain of the LNA is 23.9-24.8 d B,the in band gain fluctuation is only 0.9 d B,NF is 2.3-3.0 d B,S11 is less than-12 d B.Under the power supply voltage of 3.3 V,the power consumption is 68 m W.Compared with the traditional UWB LNA,the bandwidth of the proposed LNA is wider,covering four continuous bands of S,C,X and Ku.The method of simultaneous matching of input power and noise is adopted to solve the tradeoff between the noise figure and input matching of the traditional UWB LNA.The second dual band LNA operating at both 17 GHz and 24 GHz is designed and taped out in 0.13μm CMOS process.The amplifier adopts two-stage differential structure,the input and output terminals adopt on-chip balun to realize impedance matching and conversion between single ended and differential.The first stage uses the combination of LC series and parallel network as the load to realize simultaneous dual band operation.Neutralizing capacitor technology is used in both stages of the LNA.The simulation results of the proposed LNA are as follows:in the range of 17-24 GHz,the S11 and S22 are all less than-10 d B;At 17 GHz and24 GHz,the gain is 13.6 d B and 11 d B respectively,the NF is 5.8 d B and 4.6 d B respectively.The power consumption is 52.8 m W at 1.2 V and 1.8 V supply voltage.The LNA not only uses a low-cost CMOS process,but also has a higher operating frequency than the traditional simultaneous dual band LNA.
Keywords/Search Tags:Silicon based process, Ultra wideband, Dual band, Low noise amplifier, Balun
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