| Thin film transistors(TFTs),the core technology of thin film electronics,play an important role in areas such as flat panel displays,wearable sensors and neuromorphic systems,improving their performance has long been a focus of research.The solid-state gate dielectrics of conventional TFTs,such as silicon dioxide,alumina and hafnium oxide,have a specific capacitance of～10-7 F cm-2 and al induced carrier density of～1013 cm-2.Due to their low capacitance and low breakdown voltage,further increasing the carrier density and lowering the operating voltage are great challenges,and researchers are working to develop new thin-film transistor devices.In recent years,a new type of transistor with ionic electrolytes as the gate dielectric layer has attracted attention.TFTs that replace conventional solid-state gate dielectric materials with ionic electrolytes are called double-dielectric-layer thin-film transistors(EDLT),whose core feature is the formation of sub-nanometer double-dielectric layer(EDL)at the gate/electrolyte interface and channel/electrolyte interface by ionic electrolytes under an applied gate voltage.The EDL has a very high specific capacitance of the order of 10 μF cm-2 and an induced carrier density of 1015 cm-2,which exceeds the number of carriers that can be induced by conventional solid-state gate media by more than an order of magnitude,giving the EDLT the advantage of large capacitance and low operating voltage,and a very promising future.The capacitance of conventional TFTs is independent of frequency,and their electrical properties are usually analyzed under direct current(DC).Different from conventional solidstate dielectrics,the anions and cations in the ionic electrolyte move slowly and require a certain amount of time to move to form the EDLT,resulting in frequency-dependent device performance of the EDLT,so the electrical properties of the EDLT cannot be accurately analyzed under DC.However,the current related studies can only provide simple estimates of parameters such as mobility of EDLT at DC,and no study has yet proposed an accurate calculation method.Therefore,considering that the electrical performance of EDLT transistors is affected by frequency,this thesis performs the test and analysis of the electrical performance of EDLT under alternating current(AC)small signals by:(1)A test method coupling AC small signal and DC signal is proposed to monitor the capacitance and transconductance of the sample under test at each frequency by lock-in amplifier in real time and perform accurate calculation of mobility.(2)A method is proposed to test the bias stress stability of the device by an AC small signal model.The lock-in amplifier is used to measure the current and transconductance at a fixed gate voltage in real time under an applied bias stress voltage,and the threshold voltage and mobility are calculated directly with time without changing the gate voltage so that the stability test is not affected by other factors.The low voltage operating EDLTs with two different ion gate dielectrics were tested at AC small signal and DC,respectively.The results show that the mobilities obtained in the AC small-signal test are frequency independent within the device cutoff frequency,and accurate mobilities can be obtained,while the mobilities in the conventional DC test vary with frequency.Also,the method is applicable to the electrical performance analysis of common TFTs.The electrical parameters of TFTs with alumina as the gate dielectric are analyzed under AC and DC,respectively,and consistent results are obtained.Finally,the electrical stability of TFTs was tested by AC and DC methods,and the comparative analysis of the experimental results showed that the charge variation caused by scanning the transfer curve in DC test could be avoided under small signal test,and more accurate measurement and analysis of device stability was achieved. |
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