Research And Design Of Detection Circuit Of Linked Film Capacitive Pressure Sensor

MEMS capacitive pressure sensors have been widely used in automotive electronic equipment,consumer electronics,medical and other industries due to their small size,fast response,and good temperature characteristics.Compared with the traditional variable-spacing capacitive pressure sensor,the contact capacitive pressure sensor has better linearity.As a contact capacitive pressure sensor,the linkage film capacitive pressure sensor further improves the linearity between the output and the input,and at the same time increases the range of the linear working area.The corresponding detection circuit is an important technical basis and key to exert its advantages.Therefore,this thesis completes the design and verification of the capacitance detection circuit based on the linkage film capacitive pressure sensor.This thesis firstly introduces the research status of capacitance detection circuit at home and abroad in recent years,and analyzes the working principle of the linkage film capacitive pressure sensor.Then,a detection circuit architecture with capacitive-to-voltage conversion circuit and successive approximation analog-to-digital converter(SAR ADC)as the core is designed by comparing the advantages and disadvantages of some common capacitance detection circuit architectures and according to the working characteristics of the linked film capacitive pressure sensor.By optimizing the structure of the fully differential circuit,a pseudo-differential switched capacitor circuit based on two single-ended op amps is designed to overcome the nonlinear impact of the conversion result generated by the common mode feedback circuit’s injection of charges into the integral capacitor.The single-ended connection of non-differential capacitors in fully differential circuits is achieved.The DAC capacitor array of the internal 10 bits SAR ADC adopts a VCM-Based switching strategy based on capacitor splitting technology,which does not need to provide a common mode level.The capacitor array is spaced to insert 2 bits of redundant bits to improve the conversion accuracy.Asynchronous control logic is used inside the ADC to automatically allocate comparison cycles according to the time spent in each comparison.In addition,a simple control logic is designed to manage the sequence of the capacitor-voltage conversion circuit and ADC.This thesis completes the design of the detection circuit based on the TSMC 180 nm process,and uses the Cadence Spectre simulation tool to simulate and verify that the design indicators meet the expected requirements.Among them,the input capacitance range of the capacitor-to-voltage conversion circuit using the switched capacitor structure is 0.250 p F-2.875 p F,the conversion period is 1 μs,and the conversion error is 0.074% at worst;when the SAR ADC inside the circuit has a supply voltage of 3 V and a sampling rate of 1 MS/s,the ENOB is 9.85 bits;the overall detection circuit has a resolution of 6.46 f F/LSB and a nonlinearity error of 0.12%.The overall circuit’s layout design and verification are completed.