Research On Routing Lookup Technology And Design Of Network Processor SoC Based On TCAM

With the advent of the internet of everything era,the data packets on the backbone network show explosive growth.The required packet forwarding rate is increasing day by day,and the routing lookup speed has become one of the key factors limiting packet forwarding rate.Using ternary content addressable memory(TCAM)to realize routing lookup can meet the Gb/s level of link speed,but high power consumption,high price and other problems become its disadvantages.Therefore,it is of fundamental importance to conduct research on the low power and high speed routing lookup network processor SoC based on TCAM.This paper introduces the key technologies in the design process of network processor SoC firstly.Secondly,a TCAM routing coprocessor based on SRAM is designed to solve the disadvantages of the existing routing lookup scheme based on TCAM.Then,bus interface is designed for TCAM coprocessor IP to integrate it into ARM Cortex-M3 SoC,and SoC simulation and FPGA prototype verification are completed.Finally,to achieve further reductions in power consumption of the SoC,this paper carried out the synthesis and layout design of the SoC with low power technology.The major work of this thesis can be summarised as follows:(1)A TCAM unit based on SRAM and its controller were designed with verilog language.The unit realizes the whole pipeline structure of the lookup process,and the update process does not need to follow the longest prefix match rule.A TCAM coprocessor with routing lookup function was formed by cascading extension of the unit.(2)The Cortex-M3 soft core provided by ARM Design Start is used as the processor,then the coprocessor IP is integrated into the SoC by designing the AHB interface,and the power management module is designed for the SoC to reduce the power consumption.Finally,the design of the network processor SoC with routing lookup function is realized.(3)The synthesis and layout of SoC based on hierarchical design flow is realized with low power technology.The whole SoC is divided into 9 voltage domains by using the power gating and multi-voltage technology,and 7 voltage domains can be turned off by the power management unit.Combined with the clock gating strategy and the multi-threshold library,the power consumption of the SoC is reduced by 35%.Finally,the main frequency of the SoC reaches 500MHz under the UMC 28nm CMOS process.And it achieves a lookup speed of 500 million times per second,which can meet the link speed of 256Gb/s.The updating speed of the SoC is 6.8 million times per second,and the power consumption is only 3.32W.