Research On Key Technologies Of Reliable Transmission Over 100G Ethernet

With the rapid development of internet technology and the emergence of new technologies such as big data,cloud computing,artificial intelligence,and the internet of things,the total amount of data globally has exploded,and massive amounts of data are being produced,transmitted,stored,and processed.To meet the increasing network bandwidth demands of users,Ethernet has undergone rapid development.As early as 2006,the IEEE802.3ba proposed the 100 G Ethernet standard,ushering in the era of 100 G ultra-high-speed Ethernet.The rapidly increasing transmission rate of Ethernet has driven the rapid development of fields such as the internet of things,autonomous driving,artificial intelligence,data centers,and industrial control,but has also brought a series of problems.Under high-speed signal transmission,the adverse effects caused by channel damage,signal interference,and link congestion are greatly amplified,severely affecting the transmission performance of Ethernet.This is extremely unfavorable for industries that require high network reliability,such as data centers,autonomous driving,the internet of things,and industrial control,and the reliable transmission of ultra-high-speed Ethernet has become a problem that these industries must face in their further development.In order to reduce transmission bit error rate and improve network reliability,the IEEE Ethernet standard stipulates that 100 G and above ultra-high-speed Ethernet must use Forward Error Correction(FEC)technology to detect and correct errors that occur during transmission.However,FEC-based physical layer error correction technology has a correction limit and cannot handle link layer packet loss.Existing link layer redundancy protocol methods mainly focus on flow control and error detection,and do not fully consider the problems of high resource overhead,high CPU usage,high latency,and low bandwidth utilization caused by upper layer protocol retransmission under ultra-high-speed Ethernet transmission.In view of this,thesis studies the reliability technology of ultra-high-speed Ethernet transmission above100 G,investigates the nature of problems such as bit error rate and link layer packet loss,analyzes the reasons for the unreliable transmission of ultra-high-speed Ethernet,and then improves existing FEC technology,designs a dual-mode RS decoder for 100 G Ethernet to reduce resource overhead and power consumption in the FEC decoder.Then,a Link Layer Retransmission Control mechanism based on Identification Confirmation and Reply(ICR-LLRC)is proposed,which configures packet loss detection and retransmission processing at the link layer to achieve reliable transmission of Ethernet at the link layer.Finally,the ICR-LLRC mechanism is applied in a data center to solve the problem of enhanced Ethernet physical layer bit errors,reduce the adverse effects of link congestion and bit errors on network performance.The specific research contents of thesis are as follows:1.A dual-mode decoder is designed to decode two types of Forward Error Correction(FEC)codes,namely RS(528,514)and RS(544,514).Due to the utilization of different FEC encoding schemes for varying transmission rates of 100 G and above ultra-high-speed Ethernet,each encoding scheme corresponds to an independent decoding instance within the FEC decoder,resulting in significant resource wastage.To address this,the decoding principle of different types of RS codes in the same Galois field is analyzed,and the dual-mode RS decoder is introduced into the ultra-high-speed Ethernet FEC decoder.A universal Syndrome Calculate(SC),Key Equation Solve(KES),Chien Search and Error Evaluation(CSEE)module is designed for both decoding instances,specifically for the sharing of computation resources and memory.Experimental results show that the dual-mode RS decoder can successfully decode two FEC specifications,with decoding latency of 93 ns and 96 ns respectively.Compared with traditional FEC decoders,the resource overhead and power consumption are reduced by 32.32% and 17.34% respectively.2.To overcome the insufficient reliability of current ultra-high-speed Ethernet transmission and the inability of traditional FEC error-correction technology to solve link-layer packet loss,an over-designed link-layer redundancy protocol that relies heavily on upper-layer protocol retransmission results in high resource consumption,high CPU utilization,high retransmission latency,and low bandwidth utilization.A new Ethernet reliability design based on the ICR-LLRC mechanism is proposed.By introducing the Identify Confirmation and Reply(ICR)mechanism for link layer packet loss detection,the Link Layer Retransmission Control(LLRC)mechanism is added for link layer packet retransmission handling,eliminating the dependence on upper-layer protocols and reducing the retransmission path to lower the latency.The experimental results show that the design can effectively reduce the retransmission path and increase the bandwidth utilization.When the retransmission buffer size is set to 128*32(bit width * depth),the retransmission latency is reduced by 54.7%,and the effective bandwidth utilization is increased by 29.1% during bandwidth convergence.3.Priority based Flow Control(PFC)in Enhanced Ethernet of data center suffers from the issues of deadlock,unfair competition,and head-of-line blocking.Explicit Congestion Notification(ECN)has the problem of slow response.In addition,Enhanced Ethernet cannot solve the issue of bit errors at the physical layer.To address these problems,an ICR-LLRC mechanism is proposed to enhance the traditional Enhanced Ethernet.By using link-layer packet loss detection and retransmission,this design can solve the problem of physical layer bit errors and the reliance on upper layer protocol retransmission,and further improve the transmission efficiency of data center Ethernet.Experimental results show that this design can effectively reduce congestion duration in case of link congestion or physical layer errors,mitigate the impact of packet loss rate on RDMA(Remote Direct Memory Access)performance,and improve throughput,which is related to the size of the retransmission buffer.