The Design Of High Frequency And Efficiency Control Chip For Double Clamp ZVS BUCK-BOOST Dc Converter

With the rapid development of new energy vehicles,as a member of the isolated DC-DC converter,the Double Clamp ZVS Buck-Boost converter which uses the quadrilateral inductor current mode modulation is widely used in the intermediate bus architecture of the vehicle battery management system.With the continuous pursuit for high power density,high efficiency and strong anti-interference ability of vehicle power supply products,the design of high frequency and efficiency control chip for Double Clamp ZVS Buck-Boost converter has important research value.The primary-side feedback closed loop control strategy based on voltage second balance control scheme is firstly introduced in this dissertation,which obtains the secondary output voltage by sampling the clamping capacitor voltage to avoid the use of optical coupler to reduce system cost and improve reliability.Secondly,by analyzing the main loss sources of the Double Clamp ZVS Buck-Boost converter as fully as possible,the loss model of the converter is established.With regard to the main constraints of the supply system,an optimal switching frequency selection method is proposed to obtain minimal loss in the wide input range and full load condition.Finally,more effort is committed to design the control chip,including simple power-on sequence and protection logic.For primary-side feedback and high efficiency multi-mode control,a volt-second balance circuit with variable/fixed early shutdown time,a dual timer circuit and a multi-mode control circuit are worked out to increase primary-side sampling accuracy,switching frequency accuracy and dead time adjustability.Based on the CSMC 0.25μm Enhance BCD process,the overall simulation verification of the control chip is carried out and the layout is designed by Virtuoso software.Under wide input voltage range and full load conditions,the result shows that the system output voltage is stable,the maximum ripple is 49.79m V and the constant voltage accuracy is±1.6%;the maximum overshoot in the dynamic process is 1.194V,and the recovery time is 4ms approximately;the average efficiency under multi-mode control can reach 71.13%,the light load efficiency is 60.12%,the peak efficiency more than 89.39%under full load conditions;the chip area is about 10.24mm~2.The function of the chip and the performance of the converter meets the design expectation.