Design Of High Efficiency Four-switch Buck-Boost Converter Chip

The continuous development of digital economy industries,including new energy vehicles,5G communications,cloud computing and Internet of Things,has created a vast market for power management integrated circuit.As a DC-DC converter,the Four-Switch Buck-Boost converter is widely used because of the same polarity of input and output voltage,simple structure,small volume,low voltage stress on the switching FETs,and can realize Buck/Boost function in a wide range of input voltage.In this thesis,the operation modes and mode transition of the Four-Switch BuckBoost converter are studied.Firstly,Pulse Width Modulation（PWM）valley/peak current mode control is adopted to improve the EMI immunity of the converter.And Buck Mode is used to step down voltage,while Boost Mode is used to step up voltage,through which the switching loss is reduced and conversion efficiency gets improved.Secondly,compared with the standard Buck-Boost Mode with two FETs on/off at one time,a ValleyBuck and Peak-Boost Splitting（VBPBS）operation mode is proposed to reduce the power loss of transition state and achieve smooth switching between operation modes.Combined with the duty cycle information of the switching FETs,the valley/peak current limit and mode transition strategy are designed.Since there are different operation modes under different input and output conditions,the small signal models of the loop in Buck Mode and Boost Mode were carried out based on Ridley model,respectively.And the conclusion that the Boost Mode has the worst loop stability was drawn.Thus,the compensation network was selected and optimized,and the slope compensation was applied to meet the requirements of loop stability under different operating conditions.Based on the above research,a Four-Switch Buck-Boost converter with high conversion efficiency is designed with 0.18μm Bipolar-CMOS-DMOS（BCD）process.The design and simulation of each sub-circuit of the converter is completed using Spectre,including the bootstrap capacitor refresh circuit designed to solve the bootstrap capacitor leakage problem existing in the Four-Switch Buck-Boost converter,the duty cycle detection and switching circuit designed for mode transition,and the trimming circuit designed for chip performance optimization.And HSPICE is used to complete the overall simulation of the converter in this thesis.The simulation results show that the chip can support a maximum load current of 5A.Under the condition of 200 k Hz switching frequency and 24 V output voltage,when the converter switches from Buck Mode and Boost Mode to the VBPBS Mode,the output voltage changes 9.2m V and 92 m V,and the inductor current changes 0.31 A and 0.28 A,respectively.And when the converter switches from the VBPBS Mode to Buck Mode and Boost Mode,the output voltage changes24.2m V and 110 m V,and the inductor current changes 0.38 A and 0.33 A,respectively.The fluctuation of voltage and inductor current during mode transition is reduced,and the mode transition is smooth.The efficiency of the chip is above 94% under different input and output conditions,and the peak efficiency is 98.16% under Buck Mode.Finally,the layout design of the Four-Switch Buck-Boost converter chip is completed,and its layout area is 1.57mm×2.47 mm.