Research On Transient Sampling And Signal Conditioning Circuit Of Sampling Oscilloscope

With the rapid development of communication technology and microwave technology,the signal bandwidth and data rate are becoming higher and higher.The existing real-time oscilloscope is difficult to meet the requirements of high bandwidth sampling rate.The sampling oscilloscope samples high-frequency signals at a lower sampling rate in an equivalent sampling mode,which not only overcomes the restriction on AD conversion rate,but also has a wider bandwidth.Therefore,the sampling oscilloscope has a wide range of applications in 5G communication,information countermeasures and other fields.As the core device of the sampling oscilloscope,the sampler realizes the sampling of broadband signal under the trigger of low jitter narrow pulse.In order to realize the transient trigger sampling of the sampler and the recovery and identification of the transient signal,the low-jitter ultra-narrow pulse compression circuit will be studied and designed in this paper;The transient signal recovery and conditioning circuit is studied and implemented to verify the feasibility of the circuit.The main contents of this paper are as follows:First of all,based on the analysis of the principle of sequential equivalent sampling,the working principle and composition of the sampling oscilloscope are analyzed,and the working principle of its core device,the sampler with dual Schottky balance structure,is analyzed;Secondly,in order to meet the requirements of high bandwidth and low jitter transient sampling,a low jitter narrow pulse compression circuit with amplitude greater than 4V,falling edge less than 150 ps and jitter less than 33 ps is designed based on the step recovery diode to realize the low jitter trigger of the sampler;Thirdly,in view of the transient sampling signal of the sampler being a transient value and the poor symmetry of the dual output signals,a transient sampling signal conditioning circuit is designed.Through the design of differential impedance integral transformation and multi-stage filter amplification circuit,the signal conditioning and conversion of the narrow pulse train signal output by the sampler is realized to meet the requirements of AD sampling.A vertical bias calibration circuit is designed based on FPGA to solve the problem of poor output symmetry of sampler.Finally,based on the analysis of EMC theory,the PCB is designed and manufactured.The designed narrow pulse trigger circuit and signal conditioning circuit are combined with other modules of the whole machine.The experiment shows that the whole machine can sample and recover high-speed photoelectric signals with amplitude less than 400 mv and bandwidth less than 20 GHz,which verifies the feasibility of the designed circuit.