Design And Implementation Of SM3/SM4 Algorithm In Vehicle Hardware Safety Module

HSM(hardware security module)is usually used to protect the information security of intelligent networked vehicle.Common HSM uses public and private keys for authentication,key distribution,and communication storage encryption.In order to meet domestic standards,SM3/SM4 algorithms need to be supported.The hardware implementation of SM3/SM4 algorithm is fast,safe and real-time.Compared with the software implementation,SM3/SM4 algorithm is more suitable for the vehicle HSM module,so it is very necessary to study the hardware design of SM3/SM4 algorithm.The HSM internal hash/symmetry algorithm adopts SM3/SM4,according to the analysis of HSM architecture,the hardware architecture of HMAC-SM3/SM4-CBC is designed.HMAC-SM3 consists of two modules,and SM4-CBC consists of three modules.In order to improve the security of the algorithm,HMAC-SM3 adds a key into the processing in advance module and completes the iterative calculation of the key and input data by means of state machine jump.SM4-CBC uses recursive method to generate key parameter CKI in key operation process in key extension module.In order to reduce the cost of hardware resources,Hmac-sm3 generates message words ahead of time in message extension.In the data management module of SM4-CBC,the operation of synthesis transformation is calculated in advance.In order to improve the throughput rate of the algorithm,In the processing in advance module of HMAC-SM3 and the encryption and decryption module of SM4-CBC,the pipeline structure is designed by inserting registers in order to reduce the clock cycle required for multi-group data processing.In this paper,the realization mode and state jump of each module of the two algorithms are described in detail,and the requirements and functions of HSM specification are realized.Simulation results show that the function of the designed algorithm is correct.FPGA report shows that HMAC-SM3 uses 4118 LUT,4084 FF logic units,the highest clock frequency is 150 MHZ,and the maximum throughput is 2.02 Gbps.SM4-CBC uses2771 LUT,2228 FF logic units,a maximum clock frequency of 105 MHZ,and a maximum throughput of 1.12 Gbps,all of which meet the expected performance indicators.This design can provide reference for similar algorithm design and has good development prospect and practical value.