Hardware Platform Design Of Imaging Sonar Based On AFE

Multi-beam imaging sonar is a device that uses acoustic means to detect the underwater environment and can image in real time.Using it,the imaging effect of the underwater environment can be obtained at a long distance.In the imaging sonar,the volume and performance of the signal processing platform are of great significance to the overall performance and maneuverability of the imaging sonar.The hardware platform of the imaging sonar based on discrete components has a large number of processing channels,resulting in a large overall circuit volume,which is not suitable for use in imaging sonar.It is convenient for miniaturization design.This design uses the analog front-end chip AFE5809.Its single chip integrates 8 channels,variable gain,filtering,AD conversion and digital demodulation,which will greatly reduce the overall hardware volume and circuit scale.It makes it possible to miniaturize the image sonar equipment.Based on the analog front-end chip,this paper completes the design and implementation of the receiving circuit and the data acquisition circuit.The design of the receiving circuit is completed according to the technical indicators,and the design of the amplifier circuits at all levels is discussed and analyzed.The digital controllable gain chip VCA8500 and the analog front-end chip AFE5809,which are small in size,low in noise,low in power consumption and highly integrated,are selected.As the core chip of the receiving circuit,the theoretical maximum gain of the receiving circuit is finally designed to be 104 d B,and the gain dynamic range is 80 d B,which can well receive and process various complex underwater signals.In order to satisfy the high-speed and efficient data transmission and acquisition of the imaging sonar system,various parts of the data acquisition circuit are designed and analyzed.The data acquisition circuit includes FPGA circuit,CF card storage circuit,DSP circuit,and W5300 network transmission circuit.Finally,the functions of each part of the data acquisition circuit are designed: FPGA completes the reception of receiver data and timing control of each chip,CF card storage circuit completes real-time data storage,and DSP completes the reception of data from FPGA and controls W5300 The chip performs network transmission.After the design of the whole system is completed,the PCB design of the whole analog-digital hybrid system,the processing of power supply and ground,and the processing of noise are discussed.After the design is completed,various indicators of the receiver are tested,and the tested data and theoretical values are compared,and each data meets the requirements of the design indicators.The sequence control program of the data acquisition circuit is designed and debugged in the Quartus II software.The CF card storage circuit can store data in real time,and the network transmission of data can be carried out through the W5300 Ethernet chip.The volume of the designed system is greatly reduced,which is of great significance to the miniaturization design of image sonar,improves the convenience,and can be used in engineering implementation.