Key Technology Of Train Communication Network Terminal Design Based On Time Sensitive Network

With the rapid development of rail transportation,people put forward higher requirements for the real-time,reliability and versatility of train communication network.The widely used WTB+MVB architecture train communication network cannot meet the requirements of real-time and reliable transmission of large amounts of data due to its low bandwidth.In contrast,Ethernet can make up for its shortcomings and ensure the transmission of large amounts of data,however,Ethernet is also limited due to its inability to guarantee real-time performance.This paper explores the IEEE802.1AS protocol and IEEE802.1Qbv protocol of Time Sensitive Networking(TSN)and applies it to the train communication network to ensure the data transmission delay of the train network and make the train communication network enter the hard real-time field.and improve the real-time performance while meeting the high bandwidth.In this paper,the terminal of the train communication network supporting the time-sensitive network is designed.The main research contents are as follows:(1)Overall structure design.The overall structure design includes two parts: the bottom system design and the software design.First select the chip of ARM+FPGA architecture as the main control unit,and then configure the overall hardware resources.The software design is to analyze the function implementation of the IEEE802.1AS protocol and the IEEE802.1Qbv protocol,and build the overall architecture in the form of a state machine.(2)TSN terminal bottom system design.For the TSN terminal system,it needs to be able to support the identification of hardware timestamps at the MAC layer in the process of data transmission and reception,and at the same time to complete the scheduling of gated queues for traffic.Completed the selection and configuration of IP cores in vivado.Then build all the configured IP cores,set the corresponding pins by writing a constraint file,and then synthesize the underlying system design part.(3)TSN terminal system software design.The software design includes three parts.The first part is to establish the development environment and configure the startup file.Finally,the Linux system can be run on the hardware board.The second part is the design of the time synchronization application,which divides the functions corresponding to the IEEE802.1AS protocol into multiple modules,and completes the implementation of the optimal master clock selection algorithm,path delay implementation,time synchronization implementation and the realization of UDP communication function in turn.The third part is the design of the traffic scheduling application for the IEEE802.1Qbv protocol,including the update,call and operation of the gated list.By completing the above process of building the underlying system and software design,the terminal design supporting the time-sensitive network is finally realized.(4)Use the designed terminal equipment supporting time sensitive network to build an experimental platform,and test the IEEE802.1AS protocol and IEEE802.1Qbv protocol on this platform.The function verification of the time synchronization function and the selection of the best master clock in the IEEE802.1AS protocol is carried out by grabbing the message during the terminal communication process.A simulation platform is built to analyze the delay characteristics to verify the function of the gated list in the train communication network,and the function verification of the IEEE802.1Qbv protocol on the terminal system is completed by controlling the opening and closing gates of the gated list.