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Research And Design Of Low Voltage And Low Power Interface Circuit For Physiological Signal Detectio

Posted on:2024-06-24Degree:MasterType:Thesis
Country:ChinaCandidate:W J ChenFull Text:PDF
GTID:2530307067977409Subject:Integrated circuit engineering
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With the rapid development of Chinese medical and health industry,wearable electronic sensor devices have also made great progress,and provide new solutions for new medical models such as telemedicine.The development of low power integrated circuit,low power wireless LAN),new materials and other technologies provide solutions for the size reduction,power reduction and performance improvement of wearable medical devices.The interface circuit used for physiological signal detection is an important component of wearable medical devices.The quality of signal acquisition,interference suppression ability and signal preprocessing ability determine the performance of the interface circuit.Successive approximation Register Analog-to-Digital Converter(SAR ADC)Successive approximation register analog-to-digital converter(SAR ADC)Successive approximation register analog-to-digital converter(SAR ADC)Successive approximation Register analog-to-digital converter(SAR ADC)Successive approximation Register analog-to-digital converter(SAR ADC)Successive approximation Register analog-to-digital converter(SAR ADC)Successive approximation Register analog-to-digital converter(SAR ADC)Is becoming an important part of physiological signal detection interface circuit.At the same time,the realization of signal preprocessing circuit of system on chip for specific signals,such as Electrocardiogram(ECG)low power preprocessing,is also an important research direction of high-performance interface circuit.In this paper,we introduce the characteristics of common physiological signals,especially the influence of motion artifacts and baseline drift in ECG signals and analyze the required performance indexes of low-power interface circuits.Then,the working principle of SAR ADC is briefly discussed,and the influence of each key module on the overall performance of the system under low voltage conditions is expounded,including the influence of non-ideal factors such as sampling switch nonlinearity,capacitor mismatch,comparator mismatch voltage and noise.Based on the above theoretical analysis,this paper takes low power heart rate detection circuit and low power and low speed SAR ADC as research objects,studies a bimodal heart rate detection method and baseline following technology,proposes several substrate bias circuits suitable for low power supply voltage,and applies them to the designed low power SAR ADC.The main research contents and achievements are as follows:1.Proposed and realized a pure digital adaptive heart rate detection circuit.First,the analog front-end circuit amplifies the heart rate signal and then differentiates it into a bimodal signal.The bimodal signal is fed into the finite state machine through delay,so as to determine the validity of the heart rate signal.In addition,in order to reduce the leakage phenomenon and track the baseline voltage more conveniently,R-DAC is adopted to realize the step change of the baseline tracking voltage by controlling the current flowing through the resistance.The circuit has the characteristics of low power consμmption,adaptive baseline tracking and motion artifact removal.The simulation results show that when the VDD is 1.2V,the accuracy of the circuit to detect the input heart rate signal is 99.9%,the power consμmption is only 100 n W,and the area is only 0.09mm2,which is suitable for the digital interface circuit of physiological signal detection.2.Proposed and realized a SAR ADC of 10 bit and 10 k S/s with low working voltage and low energy consμmption.The ADC uses a Vcm-based timing that reduces capacity by 80%and power consμmption by 98% compared to conventional capacitor array timing.In addition,in terms of low-voltage design,this paper analyzes the influence of various non-ideal factors on ADC performance under low-voltage conditions and uses bulk-driven technology to optimize modules such as bootstring switch,two-stage dynamic comparator and SAR logic.The simulation results show that the SAR ADC has a significant digit of9.5bit and a quality factor of 5.78 f J/conv.-step at a power supply voltage of 0.6V.With an area of 0.25mm2 and an overall power consμmption of 43 n W,the circuit can be used to collect and process physiological signals such as ECG,EEG and EMG.
Keywords/Search Tags:Physiological signal, interface circuit, successive approximation(SAR), analog-to-digital converter(ADC), heart rate detection
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