Font Size: a A A

Harmonic Analysis And Design Of N Path Filter

Posted on:2022-12-15Degree:MasterType:Thesis
Country:ChinaCandidate:H ZhongFull Text:PDF
GTID:2518306770970359Subject:Automation Technology
Abstract/Summary:PDF Full Text Request
With the rapid development of wireless communication technology,the demand for multi-standard and multi-frequency receivers is also increasing.The frequency response of traditional filter is relatively fixed,so it is no longer an ideal choice in multi-mode multi-frequency receiver.However,N path filter has attracted more and more attention in recent years due to its characteristics of adjustable center frequency,high quality factor,easy integration,and better realization of multi-frequency filter function in front of receiver.At the same time,due to the switching sampling characteristics of N path filter,the filter circuit will appear high order harmonics and harmonic folding in the passband,which limits the application range of the circuit.Therefore,this paper focuses on the harmonic problem in the circuit.The main work is as follows:(1)A differential N path filter based on sampling calculation is studied and designed.In this circuit,the harmonic folding effect is suppressed by stacking two N path filters with time offset.At the same time,the N path filter is designed as a differential circuit structure,and the differential signal mode is used to suppress even harmonics,while the other harmonics are also attenuated by the phase difference between switches.The circuit is simulated under the SMIC110nm process,and the simulation results show that:Under the condition of working voltage of 1.2V,the harmonic rejection can be realized in the range of0.3-1.0GHz at the center frequency of the circuit.The rejection at 3fs and 5fs can reach 49d B and 67d B,and the attenuation of the strongest harmonic folding signal at(k Ną1)fs can reach51.8d B.(2)In order to simulate the ideal sinusoidal local oscillator clock,a sinusoidal fitting harmonic rejection circuit is designed.The whole clock cycle of local oscillator is approximated as sinusoidal signal by superposition of multiple clock channels according to certain gain ratio.Using the approximate sinusoidal clock signal to drive the multiphase switch of N path filter,the high harmonics of N path filter can be suppressed effectively.In order to achieve the required gain ratio,this design adopts two ways:transconductance amplifier to provide gain and changing the on-resistance of MOS switch.The circuit is simulated and verified by SMIC110nm process.The simulation results show that both methods can effectively suppress harmonics when the working voltage is 1.2V.The transconductance structure center frequency can be adjusted in the range of 0.1-1.1GHz,and the rejection at 3fs and 5fs reaches 45d B and 57d B,while the switching structure center frequency can be adjusted in the range of 0.1-3.0GHz,and the rejection at 3fs and 5fs is 44d B and 50d B.The two N path filters studied in this paper have good harmonic rejecion effect.After layout design and circuit imitation verification,the results obtained are basically consistent with the pre-imitation,which can be applied to the front-end filtering of receiver.
Keywords/Search Tags:N path filter, Mixer, Harmonic Folding, Harmonic Rejection
PDF Full Text Request
Related items