Research On Key Technologies Of Ultra-high Transmission Rate Wireless Communication Links: IQ Imbalance Compensation Technology

One of the signs of the development of wireless communication technology is the step-by-step growth of the communication rate.This thesis studies one of the key technologies in ultra-high transmission rate wireless communication links: IQ imbalance compensation technology.IQ imbalance is due to the fact that when the data is subjected to quadrature modulation or the signal is subjected to quadrature demodulation,the amplitudes and phases of the local oscillator signals of the I and Q channels are not equal and the phases are not quadrature,resulting in a conjugate interference of the data,affecting the communication chain.road performance.The solution to the IQ imbalance problem is to estimate its imbalance parameters in the digital domain and then compensate.The ultra-high transmission rate requires a large communication bandwidth.Under the large bandwidth,a new feature of IQ imbalance appears: frequency dependence.For frequency-dependent IQ imbalance,new methods are needed to estimate and compensate.At the same time,since the compensation for IQ imbalance is real-time,the ultra-high transmission rate means that the IQ compensation module requires ultra-high throughput.The main work of this thesis is as follows:Analyze the frequency-dependent IQ imbalance model,study the estimation method of the imbalance parameters,deduce the conditions for separating the IQ imbalance parameters of the sender and the receiver,and design an estimation scheme;then study the compensation conditions,aiming at reducing the use of filters,The compensation circuit is deduced and simplified until the IQ compensation module contains only one convolution.Then the estimation method and compensation circuit are combined to improve the estimation accuracy by an iterative method,and the iterative estimation accuracy and compensation performance are simulated.Research the Implementation method of Parallel Finite Impulse Response(FIR)Filters,deduce the parallel formula of the filter and obtain the parallel filter structure,which can be obtained by the expansion of linear convolution,build a matrix model,and analyze the concerns and optimization methods of hardware implementation;then introduce Three different linear convolution expansion algorithms are presented and their advantages and disadvantages are analyzed.Finally,it is pointed out that a filter structure with a small number of parallel channels can be used to synthesize a filter with a large degree of parallelism by means of a hierarchical cascade method.Study the difficulty of realizing the simplified Q-channel compensation structure,analyze the design method of 120-channel parallel filter,design 2,3,4,5,and 8-channel parallel filter structures with three linear convolution expansion methods,and then cooperate with the cascade method Design schemes are given for filters with different tap numbers.Then take 7 as the length of the compensation coefficient,and give the specific implementation of the IQ compensation module on the Field Programmable Gate Array(FPGA).Finally,the implemented IQ compensation module,as well as the IQ parameter estimation and compensation coefficient update module and the parallel sub-filter tap calculation module implemented in C++,are simulated jointly with VIVADO HLS and MATLAB to analyze the estimation performance and compensation effect.