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Design And Fabrication Of Low Operating Voltage Non-Parasitic Capacitance Organic Field-Effect Transistors

Posted on:2022-08-25Degree:MasterType:Thesis
Country:ChinaCandidate:Y CheFull Text:PDF
GTID:2518306725490864Subject:Chemistry
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After years of development,due to the advantages over inorganic transistors,such as low cost,flexibility,transparency,solution processing etc.,organic field-effect transistors(OFETs)have played an important role in practical applications,especially in the flexible stretchable equipment.At present,researches on OFETs are mainly focused on the improvement of mobility,especially in the aspects of material and interface modification,but the innovation in the structure of transistor devices is relatively insufficient.In view of the growing demand of portable low-voltage equipment and the application of organic electronics in high-frequency circuits,this paper explored the structure of organic electronic devices and optimized the performance of the devices.The main results are as follows:(1)The key factors to reduce the working voltage of the gate dielectric layer were discussed,and the gate specific capacitance was increased by in-situ growth of the alumina dielectric layer.Metal-Insulator-Semiconductor(MIS)diodes were used to characterize the quality of the dielectric layer.After a dense Al2O3 layer was formed on the oxidized Al surface,the leakage current density of the diode structure was kept below the level of 10–6 A·cm–2 at 0-2 V operating voltage,which proved that it had good dielectric quality and was expected to be used as a gate dielectric layer for low-voltage OFETs.(2)We prepared a test device of Si O2/Al2O3 composite dielectric layer,which was used to show the interface between gate dielectric layer and semiconductor,and we characterized the effect of interface modification on the performance of the device.The interface of the transistors was modified by ODPA(octadecyl phosphonic acid)SAMs(self-assembled monolayers)grown by solution immersion method,and the mobility of the test device was increased to the maximum 1.872 cm2·V–1·s–1,and the Ion/off ratio was increased to 108.(3)On the basis of in-situ Al2O3 dielectric layer growth and ODPA modification technology,the registration accuracy of gate electrode and source drain electrode in OFETs was improved to 50-100 nm by self-alignment in lithography and wet etching.Low-voltage(operating voltage<3V)OFETs with zero parasitic capacitance were obtained.The performance of the OFETs devices with different channel lengths(2-20?m)was studied.The mobility was increased from 0.065 cm2·V–1·s–1 to the highest 0.204 cm2·V–1·s–1,and the gate leakage current was controlled below 10–10 A.(4)We also used the process similar to the low-voltage OFETs without parasitic capacitor,supplemented by inclined evaporation technology,to prepare a planar organic rectifier diode.Through the optimization of its structure and preparation process,the rectifier ratio was increased to about 100.Combined with a low-voltage transistor without parasitic capacitance,the planar diode is expected to be used in logic circuits with high operating frequency.
Keywords/Search Tags:Low operating voltage, non-parasitic capacitance, interface modification, organic field-effect transistors, self-aligned micro-nano process
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