Algorithm Optimization And Hardware Implementation Of H.265 Lossless Intra Frame Coding

Since the release of H.265 video coding standard in 2013,with its excellent performance of high coding efficiency and low distortion,it has been widely used in many industries.However,the lossless video coding still plays an important role in some high-precision fields,such as fingerprint image storage,satellite remote sensing image storage and the medical image transmission and remote desktop under the impact of COVID-19,since it is distortion-free.Through the in-depth study of H.265 lossless intra frame coding,this paper summarizes the defects in intra prediction and coding unit partitioning,and proposes the optimization algorithms.The innovations in the dissertation as follows:1)Aiming at the low accuracy of intra prediction in the region far away from the reference samples,an L-shape-based Iterative Prediction algorithm is proposed,which shortens the distance between predicted samples and reference samples to 1 unit,thereby greatly improves the accuracy of intra prediction;2)In view of the defect that the coding unit partitioning under quadtree structure can not adapt to the rich texture of small area,this paper proposes an L-shape-based partitioning algorithm,which makes the coding unit partition more flexible.At the same time,it can integrate with L-shapebased Iterative Prediction and become a joint algorithm to future improve the coding efficiency;3)In view of the special spatial redundancy of intra prediction residuals,Residuals Median Edge Detect algorithm is proposed to predict the residuals again,which can effectively reduce the special spatial redundancy and improve the coding efficiency.In addition to the above algorithm innovations,we also carried out the work of hardware implementation and verification.1)The improved algorithm is implemented on the basis of H.265 hardware encoder,and the test data is collected through behavioural simulations to compare the gain of software and hardware;2)FPGA is used to build the prototype verification platform of hardware video coding system,through which proposed optimization algorithms can be verified and tested at the hardware level.Proposed algorithms are tested using the standard test sequences under common test condition specified by joint expert group.Experimental results show that,compared with H.265 test model,the above three algorithms get 9.31%,2.34% and 7.04% bitrate saving respectively,and the joint algorithm gets 10.21% bit-rate saving,which proves that the proposed algorithms are significantly optimized.In FPGA verification,the optimization effect is equivalent to that of software testing,which proves that the hardware implementation of the proposed algorithms are feasible and worthy of application.