Generation And Verification Of ST Language Code Based On Soft PLC Model

Soft Programmable Logic Controller(Soft PLC)is a control system based on a general operating system and PC.It has the advantages of high openness,rich instruction sets,and easy maintenance.With the formulation and popularization of the IEC61131-3 standard,soft PLC technology has also gained rapid development.IEC61131-3 is a unified programmable controller standard proposed by the International Electrotechnical Commission.This standard is based on the traditional PLC architecture and applies modern software engineering programming ideas to the traditional PLC programming language.Five standard programming languages are proposed,which are graphical Programming languages including LD,FBD,and SFC,and text programming languages including ST and IL.Among which ST is the only textual high-level programming language.It is widely used in large-scale PLC systems due to its strong logic,easy transplantation,and concise code.Therefore,it has been loved by many PLC programmers.Since the five programming languages have different styles and a set of code compilers must be customized for each programming language,which greatly increases the complexity of the soft PLC system.This article analyzes the core technical points of the soft PLC system in detail and conducts in-depth research on the IEC61131-3 standard.It proposes a code generation solution that transforms the graphical programming language into ST language,which reduces the difficulty of implementing the soft PLC system compiler.It provides a new idea for the design of a programming language compiler.At the same time,given the difference and diversity of graphic elements in the three graphic programming languages of IEC61131-3,this paper designs a general soft PLC model.It realizes the persistent storage structure and memory structure of graphic elements and implements a model converter which used to support the two-way conversion between the persistence model and the memory model.In addition,this article uses component software design ideas and implements the front-end part of the ST code compiler based on computer compilation principles to verify the ST code.It is divided into three independent components including lexical analyzer,grammatical analyzer,and semantic analyzer,which respectively realize the lexical analysis,grammatical analysis and semantic analysis of ST language,and carry out unified exception management for all modules.Finally,starting from actual application cases,this article uses the general industrial control software integrated development environment designed by this laboratory as the basic software architecture and uses the LD,FBD,and SFC programming languages to design corresponding control case requirements.After using the code generator to convert each case project into ST code,further compile it into C code,and check whether the generated code meets the requirements.The experimental results prove the correctness and feasibility of the code generation and verification scheme proposed in this article.