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Study On The Baliga's Figure Of Merit Of SOI-LDMOS

Posted on:2022-08-04Degree:MasterType:Thesis
Country:ChinaCandidate:Y X HuangFull Text:PDF
GTID:2518306575964279Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
LDMOS,one of the power semiconductor devices,is widely used for low to medium power management because of its fabrication process which is compatible with the conventional CMOS process,the simplicity of the drive circuit and the relatively faster switching speed.Using LDMOS for low and medium power processing can make us use of electric energy more efficiently,save energy and improve the effect.This is not only in line with the concept of environment-friendly society,but also a major trend in the development of social science and technology.However,LDMOS has a"Silicon limit"(Ron,sp?BV2.5)relationship,which makes it difficult for LDMOS devices to have both high breakdown voltage and low specific on resistance.In view of the above problems,two new structures of LDMOS devices are proposed,and their main mechanism parameters and electrical properties are analyzed and discussed.1.The new structure is heavily doped in the top layer of the drift region to create a lower resistance electron channel,which reduces the specific on-resistance of the device during forward conduction.In addition,a super junction composed of p-type and n-type columns is added below the low resistance channel to optimize the electric field in the drift region and help to deplete the low resistance electron channel.Finally,a LDMOS device with a breakdown voltage of 253 V and a specific on resistance of 15.5 m??cm2is obtained,and the Baliga value of the device is equal to 4.1 MW/cm2.2.In order to improve the problem caused by the"Silicon limit",the new structure uses the principle of electron accumulation effect to reduce the specific on resistance of the device,while maintaining a high breakdown voltage.The traditional LDMOS structure is separated into two parts by the oxide layer.The front is a traditional LDMOS structure,and the back is a PNP structure.The simulation results show that the breakdown voltage of the new device is 246 V,which is basically unchanged compared with the traditional LDMOS device.The specific on resistance of the new structure is 3 m??cm2,which is much lower than that of traditional LDMOS devices.The Baliga's figure of merit of the new structure device is equal to 20 MW/cm2,which indicates that the comprehensive performance of the device is better.From the structure principle and simulation results,this structure can effectively reduce the device specific on-resistance compared to the traditional LDMOS device,while maintaining the device at a high breakdown voltage,but cannot increase the device breakdown voltage.
Keywords/Search Tags:power semiconductor, LDMOS, silicon limit, Baliga's figure of merit, electron accumulation effect
PDF Full Text Request
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