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The Implementation Of RS Encoder And Decoder For 100GBASE-KP4 Standard

Posted on:2022-01-09Degree:MasterType:Thesis
Country:ChinaCandidate:Z G ChenFull Text:PDF
GTID:2518306572479924Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
With its excellent ability to correct random errors and burst errors,Reed-Solomon codes(RS codes)has become one of the commonly used error control methods in Ethernet communication systems.In practical applications,how to quickly and effectively test the function of the RS codec circuit;when the circuit is disturbed by the external environment or other factors,and the circuit status become abnormal,how to recover the circuit functions without performing system reset(System reset will greatly affect the progress in business).These are problems that need to be faced and solved in actual production.Based on the conventional codec,this paper designs a RS codec with self-detecting and self-recovering functions,which is composed of four modules: encoding module,error-insertion module,decoding module and error statistics module.The error-insertion module is used to assist the circuit to complete the circuit self-test function.After the encoding module encodes the test vector,the error-insertion module can perform three modes of error insertion on the test codeword,including random errors insertion,burst errors insertion,and arbitrary designated position errors insertion.The error correction performance of the circuit can be checked by the circuit decoding the test codeword after the error has been inserted.In the case that the codec circuit functions normally and the number of error symbols does not exceed the error-correcting ability of the codeword,the decoding module can correct the test codeword and count the number of error symbols in the codeword.The self-recovery function of the circuit relies on the synchronization of the data indication signal.When new data comes,the circuit can complete the restoration of the circuit state according to the indication signal and perform a new round of coding work.After the design simulated and synthesized.It can be seen that the circuit coding and error correction functions,self-detecting and self-recovering functions have been correctly implemented according to the simulation results.Using Altera's EP4CE40F23C8 chip to synthesize the circuit,the comprehensive results show that the LUT(lookup table)and the number of registers used are 33674 and 6039 respectively,and the highest operating frequency is 125 MHz.This design not only correctly implements the designed function,but also performs well in the actual circuit,which can be used as a reference for other related designs.
Keywords/Search Tags:Ethernet, FPGA, Reed-Solomon, RiBM
PDF Full Text Request
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