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Design And Implementation Of Single LDR Image To HDR Image Based On FPGA

Posted on:2021-02-17Degree:MasterType:Thesis
Country:ChinaCandidate:H SuFull Text:PDF
GTID:2518306569994939Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
High Dynamic Range(HDR)images can present richer colors and more brightness levels relative to Low Dynamic Range(LDR)images,which can meet the requirements of computer graphics and related industries.At the same time,it can also meet the need from people for high-quality visual experience.Traditional HDR images are obtained by synthesizing multiple LDR images with different exposures in the same scene,but most of the existing LDR visual media exist in the form of single exposure versions,so it is of great significance to transform a single LDR containing limited information into an HDR image with more detailed information.However,the existing single LDR to HDR image conversion is generally based on software solutions,with complex algorithms,no real-time performance,and limited application scenarios.To solve this problem,this dissertation proposes a real-time single LDR to HDR image solution based on FPGA(Field-Programmable Gate Array).First,the pixel value of the LDR image is linearized by inverse gamma correction,and then the contrast limited adaptive histogram equalization algorithm(CLAHE)is used to improve the local contrast of the image.The traditional CLAHE algorithm is accelerated through image segmentation and bilinear interpolation.Then,the image is stretched to a high dynamic range by linear stretching,and finally the color saturation is restored by color correction to generate HDR images.This dissertation uses the correlation between video frames in the circuit design,removes the frame buffer,solves the problem of excessive storage resources occupied by the buffer,and doubles the image processing speed of the system.Using the time sequence relationship between the histogram generation and the mapping function generation,the circuit is designed so that the histogram and the mapping function are time-shared and reused to achieve the purpose of further saving storage resources.Aiming at the problem of color saturation loss that can occur in a single LDR to HDR conversion scheme,a color correction circuit is added to restore the color saturation reduced by the expansion of the brightness component.This dissertation analyzes the subjective and objective image quality of HDR images generated by our scheme and other scholars' schemes.The analysis results show that compared with other scholars' schemes,this dissertation has unearthed more detailed information that is difficult to see with the naked eye.At the same time,it retains the highest degree of visible detail information.The generated HDR image contains more detailed information,has the smallest perception difference from the real scene HDR image,and has a higher perceptual quality.In this dissertation,a single LDR to HDR image conversion system is implemented on Xilinx's Zynq XC7Z020 FPGA development board.The system works at a clock frequency of 100 MHz,with a total power consumption of 1.883 W on-chip,and a processing speed of 124.5 frame per second for images with a resolution of 1024*768,which can realize real-time HDR conversion of high frame rate LDR video.
Keywords/Search Tags:FPGA, high dynamic range, bilinear interpolation, histogram
PDF Full Text Request
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