| With the popularization and development of robotics,the applications of robots are expanding.In order to adapt to complex and dynamic environments and complete tasks autonomously,robots must have the ability to simultaneous localization and mapping(SLAM).The bundle adjustment(BA)method is one of the most effective solutions in the SLAM technology,but the high latency and power consumption caused by its large amount of computation restrict its applications in embedded systems.In order to solve this problem,this paper explores the hardware design of the bundle adjustment.An FPGA accelerator for bundle adjustment is proposed and implemented in this paper.Aiming at the characteristic that the computational complexity and space complexity in bundle adjustment are affected by the co-observation value of three-dimensional feature points,a Co-Observation Optimization technique is proposed.By making statistics on the co-observation values of the three-dimensional feature points in the data set,an optimized hardware architecture based on the distribution of the co-observation values is designed.To calculate the Jacobian matrix of projection function involved in the bundle adjustment problem on hardware,a new partial differential calculation method combining analytic differential and automatic differential is proposed.When the Jacobian matrix is calculated by hardware,the residual and cost function values can be obtained together.In addition,speculative computation technique is used.This method can simplify the algorithm flow,reduce the hardware design complexity,and reuse hardware resources to accelerate bundle adjustment.The experimental results show that compared with the embedded ARM platform,the accelerator designed in this paper has a performance improvement of7.56 times.At the same time,the energy consumed is also reduced by 51.49%.The accelerator is more suitable for embedded applications where performance and power consumption are limited. |
