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Research On Key Technologies Of HPC Interconnection Network Congestion Control

Posted on:2020-03-02Degree:MasterType:Thesis
Country:ChinaCandidate:K WuFull Text:PDF
GTID:2518306548496074Subject:Computer Science and Technology
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Endpoint congestion is a bottleneck in high-performance computing(HPC)networks and severely impacts system performance,especially for latency-sensitive applications.For long messages(or flows)whose duration is far larger than the round-trip time(RTT),endpoint congestion can be effectively mitigated by proactive or reactive countermeasures such that the injection rate of each source is dynamically controlled to a proper level.However,many HPC applications produce a hybrid traffic,a mix of short and long messages,and are dominated by short messages.Existing proactive congestion avoidance methods face the great challenge of scheduling the rapidly changing traffic pattern caused by these short messages.In this paper,we propose two methods from two dimensions to reduce network latency and improve network performance.First,we leverage the advantages of proactive and reactive congestion avoidance techniques and propose the Packetchaining Reservation Protocol(PCRP)to make a dynamic balance between flows following proactive scheduling and packets subjected to reactive network conditions.We select the chaining packets as a flexible reservation granularity between the whole flow and one packet.We allow small flows to be speculatively transmitted without being discarded and give them higher priority over the entire network.Second,we propose a Prefetch and prediction based Switch(PPS).PPS reduce the fall-through latency through the dynamic allocation multiple queueing(DAMQ)buffer with data prefetch and a two-level arbitration scheme,which filtering the potential failed requests in the next round by predicting the arbitration results.We conduct extensive experiments to evaluate our PCRP and PPS.The simulation results demonstrate that in PCRP the flow latency can be reduced by 50.2%for hotspot traffic and 28.38% for uniform traffic,and PPS demonstrates indistinguishable performance from the i SLIP,but with nearly half of the i SLIPs area and36.37% less logic units(LUTs).
Keywords/Search Tags:Interconnection network, Flow completion time, Switch, Low latency
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