Research On Hardware Prefetch Technology Based On The Stream Access Pattern In The Program

Since the 1970s,the development trend of processors has always focused on how to improve the execution efficiency of instructions in the core,while the main memory has mainly focused on the increase in storage capacity,ignoring the increase in speed.The difference in the development trend of processors and main memory makes it difficult to match the memory access speed between the two,which directly leads to the "memory wall" problem that affects computer performance.In an attempt to bridge the speed difference between the processor and main memory,computer architects generally adopt a hierarchical storage structure that inserts multi-level caches in the system.However,the capacity of the cache is limited compared to the main memory after all.Once a cache miss occurs during the memory access,it will cause a large miss penalty delay,which will cause the processor to access the memory stagnation.In the context of cache misses,the prefetching technology that can predict the information required for the next memory access operation of the processor and retrieve the information in advance has extremely high engineering research prospects and practical application value.Prefetch technology has the advantages of high design feasibility,low hardware overhead,and wide application range.After years of development,it has been proven to be an effective means of hiding the memory access delay between the processor and the main memory.So that improve the productivity of the procedure in the system and decrease the latency of the processor's memory access,this paper proposes a hardware cache prefetch strategy that detects and recognizes the data flow access mode in the program when the processor is working.The full text first introduces the feature of the existing prefetch strategies and condense their respective benefit and drawback,and next evaluate the feature of the memory access behavior of the program in memory,such as the address translation method,the principle of locality,the basic memory access mode in the program,etc.At the same time,it also discusses the performance optimization brought by prefetching technology in combination with a program example.Then it gives the prefetch address structure,the location,structure and composition of the prefetch components in the hardware prefetch scheme of this article,and elaborates the functions and working principles of each prefetch submodule in detail.The prefetch strategy in this article sets multiple data stream prefetch entries to achieve the ability to identify and record multiple data streams.At the same time,the strategy also performs separate and independent detection of sequential data streams and stride data streams in the program,avoiding interference between asynchronous long data streams to the greatest extent,and also improving the accuracy and efficiency of prefetching components.In addition,in order to prevent prefetch requests from affecting the execution of normal instructions,this article also sets up prefetch requests to buffer and temporarily store prefetch requests,and formulates a priority scheme for prefetch request arbitration on the fetch pipeline.Finally,complete the instantiation of the prefetch components in this article in a domestic autonomous instruction set architecture processor to form a complete processor model required for performance evaluation.Using SPEC CPU2006 as the test program,the actual run is performed on the hardware emulation accelerator.The results show that the prefetching strategy based on the data stream memory access mode may adequate enhance the execution speed of processor,raise the hit rate of all levels of cache,and finally diminish the memory access delay between the processor and main memory.