Research On The Hysteresis Effect Of TMDC Field Effect Transistor

Semiconducting two-dimensional(2D)layered materials provide a promising development path for the transistor size to enter the sub-5-nm technology node,with a dangling-bond-free surface and an atomic layer thickness.Among the family of 2D materials,semiconducting transition metal dichalcogenides(TMDC)are the most intensively studied materials beyond graphene due to their suitable bandgap,novel optical properties,large carrier mobility,etc.However,due to the atomic layer thickness and high specific surface area of TMDC materials,the performance of field effect transistors(FETs)based on TMDC is always environment-dependent,resulting in gate bias stress instability and hysteresis,which severely hinders its further development.Therefore,it is very important for the preparation of high-performance TMDC-based FETs to explore the generation mechanism of the hysteresis effect and eliminate the hysteresis effect.Based on this,the main research of this paper is as follows:(1)Lobal back-gate FETs were fabricated by mechanical exfoliation,digital maskless lithography and evaporation coating process,which prepares for the next electrical performance test.(2)Generally speaking,the environmental dependence of the device decreases as the thickness of the TMDC increases.Therefore,a few-layer WSe2-FET was selected to efficiently observe gate-bias instability and hysteresis effect.We found that the hole mobility of the transistor drastically reduces in vacuum and further decreases after in situ annealing in vacuum compared with that in air,which can be recovered after exposure to air.The on-current of the WSe2-FET increases with positive gate bias stress time but decreases with negative gate bias stress time.For the double sweeping transfer curve,the transistor shows prominent hysteresis,which depends on both the sweeping rate and the sweeping range.Large hysteresis can be observed when a slow sweeping rate or large sweeping range is applied.In addition,such hysteresis effect can be reduced in vacuum and further reduced after in situ vacuum annealing.However,the hysteresis effect cannot be fully eliminated,which suggests that the factors that cause the hysteresis effect of the device include but are not limited to the adsorption and desorption of atmospheric molecules.Both intrinsic defects and interface defects can also cause hysteresis,which can be proved from the defect peaks of the monolayer WSe2 photoluminescence spectrum and the reduction of the hysteresis of the top-gate FET.(3)In order to eliminate the hysteresis effect of WSe2-FET and maintain the performance of the device,F4-TCNQ was used as chemical dopant.Our results provide that F4-TCNQ can increase the hole mobility of the WSe2 FET and reduce the hysteresis of the device.After the device is packaged by PMMA,the thermal stability of F₄-TCNQ can be improved.