Design And Research Of CMOS In-memory Computing Key Circuits

Most of the neural networks work in the form of von Neumann architecture computer software.However,with the increasingly complex structure and increasing scale of neural networks,the realization of neural networks on computers is faced with the disadvantages of great difficulty,high resource demand and low operation speed.The hardware implementation of neural network based on in-memory computing not only simulates biological neurons and neural system in structure and function,but also overcomes the shortcomings of its implementation on computer.Therefore,this paper designs a neuron circuit and neural network circuit based on complementary metal oxide semiconductor(CMOS)in-memory computing.At the same time,a simple,efficient and scalable neural network simulation scheme is designed,and the hardware simulation of neural network is run on this basis.In the hardware simulation research based on CMOS in-memory computing,this paper starts from the design of neuron circuit,neural network and its simulation system,verifies the feasibility of hardware implementation of neural network based on CMOS inmemory computing,and designs the hardware test system of in-memory computing chip.The main work of this paper is as follows.(1)A neuron circuit based on static random access memory(SRAM)in-memory computation is designed.SRAM in-memory computing unit adopts 8 transistor structure.The simulation results show that it can realize the arithmetic operation of product and accumulation,and it has high storage data stability.Based on the SRAM in-memory computing unit,an in-memory computing array and a column level current integrated circuit are designed.Finally,a neuron model with simple implementation strategy and simple structure is obtained.(2)A neural network circuit and its simulation system are designed.The neural networks of 64×10 scale and 64×64×10 scale are designed by using the artificial neuron model proposed in this paper.Backpropagation algorithm is used to train two neural networks respectively,and the synaptic weights of neural networks are obtained.Then,the hardware description language(HDL)is used to model the behavior level of neural network simulation control platform,digital to analog conversion module and neuron output voltage comparison module,and an automatic neural network simulation system is designed.Running the simulation system,the simulation results verify the feasibility of the neural network hardware implementation scheme proposed in this paper.(3)A hardware test system of in-memory computing chip is designed.The test circuit is designed with STM32 single-chip microcomputer as the core,and the printed circuit board(PCB)of the circuit is printed.The single chip microcomputer uses the serial wire debug(SWD)interface for debugging,and uses the serial port for data communication with the computer.Finally,the control code of the single chip microcomputer is written and debugged.The hardware test system has the characteristics of simple circuit principle,easy expansion and portability,and can be used as the test system for most of the in-memory computing chips.In the main work of this paper,the three research aspects are interrelated and progressive.The in-memory computing scheme designed in this paper has the characteristics of simple implementation strategy and small circuit area.The neural network simulation scheme designed in this paper has the characteristics of simple,efficient and scalable,which proves the feasibility of hardware neural network based on in-memory computing.