| In the development of multi-core processor system,the problem of dark silicon arises.In other words,in order to not exceed the thermal design power consumption,part of the cores on chip needs to be shut off or operate in short cycles,thus forming the "dark silicon region".Due to the influence of dark silicon,the ratio of NoC power consumption in the multi-core system overhead will increase further.3D interconnection architecture for vertical stack more active device makes the heat stack effect is more significant,and power density increases further,will intensify the influence of dark silicon.From the perspective of topology reconfiguration,this paper studies the optimal design method of 3D NoC interconnection architecture in dark silicon era,and focuses on the reconfiguration design method of interconnection topology for non-" dark silicon region"(" activate region ").Firstly,the paper studies the static reconfiguration design method for 3D NoC in dark silicon era,and reconstructs the interconnection topology offline before the application execution.Based on the analysis of 3D NoC thermal model,a thermal aware mapping method for 3D NoC is proposed,which applied the task mapping to the multi-core system and reduced the maximum temperature of the system while balancing the network temperature distribution.Aiming at the "active area" formed after the mapping,based on the analysis of 3D NoC power consumption characteristics of horizontal and vertical link,a power aware topology reconfiguration method for 3D NoC is proposed.This method establishes the optimal communication path between the tasks,and determines the working state of each router(in a bypass or normal working mode)and the transmission direction in the path to generate the interconnection topology.Through experimental simulation,the interconnect topology system using the proposed static reconfiguration design method reduces the communication power consumption by 21.25% and the communication delay by 32.88% on average compared with the interconnect topology system without reconfiguration design.Secondly,the paper studies the dynamic reconfiguration design method for 3D NoC in dark silicon era,and reconstructs the interconnection topology online during the system operation.In view of network load variation in the "active region",a dynamic reconfiguration method for 3D NoC topology based on Datapath Segment(DS)is proposed.This method uses a multiple linear regression algorithm to predict the DS utilization rate in the future reconstruction period,and combines the flit deflection rate of the router non-optimal forwarding port to determine whether the DS may be turned on or off,while taking into account the shortest Hamiltonian between active nodes.The path is reconstructed to generate the interconnect topology on the premise that the network is fully connected.Aiming at the topology generated by dynamic reconfiguration,an adaptive routing algorithm based on Hamiltonian path is proposed.The shortest path direction is preferentially selected according to the DS state of each hop.If the router output port DS is closed,the specified deflection direction is selected according to the router position.Through experimental simulation,compared with the interconnect topology that is not dynamically reconstructed,the interconnect topology generated by the proposed dynamic reconfiguration design method reduces the EDP average by 13.23% under different injection rates,and under different proportions of active areas EDP was reduced by an average of 41.52%.Finally,in order to implement the topology reconfiguration design method described above,a 3D NoC router that supports reconfiguration is designed.The router can switch between three modes:bypass,normal operation,and dynamic reconfiguration to achieve topology reconfiguration in different conditions.The RTL-level modeling of the 3D NoC reconfiguration router is completed using Verilog language,and its functional verification and cost evaluation are carried out. |
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