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Design Of 0.2-2.5GHz RF Front-end Circuits Based On 40nm CMOS Technology

Posted on:2021-01-27Degree:MasterType:Thesis
Country:ChinaCandidate:S ZhangFull Text:PDF
GTID:2518306476950439Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the development of the Internet of Things,higher requirements are placed on wireless receivers.The RF front end is located at the front end of the receiver link and has an important impact on the performance of the entire receiver.The high-performance RF front-end can not only improve the overall performance of the receiver,but also greatly increase the flexibility of the wireless communication system.Therefore,the broadband front-end based on CMOS process design has important theoretical significance and application value.This paper studies and designs a broadband RF front-end suitable for the frequency range of 0.2-2.5GHz based on 40 nm CMOS technology.It is mainly composed of low noise amplifier,buffer stage,passive mixer and transimpedance amplifier.The low-noise amplifier uses capacitive cross-coupling technology on the basis of the traditional common gate to achieve broadband input matching;in order to make the entire receive link have better linearity,the mixer mainly uses a current passive mixer;Insert a buffer between the low-noise amplifier and the current passive mixer to reduce the design complexity of the RF front-end and make the RF front-end have a lower noise figure.The buffer circuit uses current multiplexing technology to reduce power consumption;It can convert the current of the current-type passive mixer into a voltage,and make the RF front-end have a larger dynamic range at the same time.A fully differential transimpedance amplifier module with variable gain is used to obtain a larger output voltage swing.The structure of the op amp with negative feedback of the resistor is used to design the transimpedance amplifier.This paper completes circuit design,pre-simulation,layout design,and post-simulation.The post-simulation results show that the power supply voltage is 0.9V,the receiver gain is 40 d B,the double-sideband noise figure of the circuit is less than 6d B in the highest gain mode,the link output 1d B compression point is-1d Bm,and the RF front-end operating current is less than 5m A.The broadband RF front-end designed in this paper meets the requirements of the design specifications and can be applied to the transceiver chip of the Internet of Things after tape-out verification.
Keywords/Search Tags:wideband, RF front-end, CMOS process, low power consumption, linearity, cross-coupling
PDF Full Text Request
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