Font Size: a A A

Analysis And Optimization Of Avalanche Stability At Low Temperature With SOI-LIGBT

Posted on:2021-07-16Degree:MasterType:Thesis
Country:ChinaCandidate:S L CaoFull Text:PDF
GTID:2518306476460424Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
Single-chip intelligent power ICs,which is widely used in the small and medium power household appliances,feature high and low voltage compatible,high integration and low parasitic elements.The silicon-on-insulator lateral insulated gate bipolar transistors(SOI-LIGBTs)usually used as the output-stage device in single-chip intelligent power ICs,driving loads such as moter.However,the SOI-LIGBTs will face the risk of avalanche breakdown if the motor load works abnormally.Currently,there exist the researches about the avalanche stability at room temperature and high temperature,but the specific mechanism analysis and optimation measures of the avalanche stability are rare at low temperature.Firstly,the avalanche stability of device is evaluated by probing the floating degree of the collector-emitter voltage(VCE)under the current stress provided to the collector electrode.The measured results show the avalanche breakdown voltage is stable at room temperature(25oC)and high tempreture(125oC),but VCE is walk and the degree of VCE is more than 10V at low temperature(-40oC).Then,conbined with the simulation restlts,it was found that the reason of VCE walk is closely related to the transfer of the breakdown spot and the triangular depletion in P-type substrate by using the charge storage effect of capacitance and charge balance principle.Finally,the optimization method of avalanche stability at low temperature with SOI-LIGBT is proposed from three aspects:the location of the initial breakdown spot,the charge effect of capacitance and the triangular depletion in P-type substrate.The improved structure in this thesis is currently taped-out on CSMC,so there are only simulation results.The simulation results perform that the VCE walk event can be suppressed but not be eliminated by the optimization of the position of initial breakdown spot,and the event can be eliminated by the optimization of the charge effect and the triangular depletion in P-type substrate.At low temperature,it is helpful to reduce the risk of failure by improving the avalanche stability.
Keywords/Search Tags:Low temperature, Avalanche stability, Breakdown voltage, VCE walk-out, VCE walk-in, Lateral Insulated Gate Bipolar Transistor, Silicon-On-Insulator
PDF Full Text Request
Related items