The Design And Optimization Of Negative Capacitance Independent Gate FinFETs

The current mainstream semiconductor manufacturing process has entered the 7 nm size with the rapid development of the IC industry.In order to meet the manufacturing requirements of IC chips with larger scale,higher speed and lower power consumption,the traditional COMS devices with shrinking size are facing with various problems such as short channel effects and energy consumption,and have gradually approached the physical limit of their normal operation.In order to meet the performance requirements of IC chips,it is urgent to replace the traditional transistor devices with new nano devices.Among them,NCFET is a new low voltage and low power device which is compatible with the current mainstream IC manufacturing process and is expected to break through the physical limit of transistors.The NCFET devices is formed by connecting a ferroelectric material with negative capacitance characteristics to the gate of a transistor device(called baseline device),and using the negative capacitance characteristics of the ferroelectric material,its subthreshold swing can be improved below 60 m V/dec.NCFET devices with small sub-threshold swing have less leakage current and sufficient on-current at low voltage,so as to achieve the goal of low power consumption.In this paper,we introduce a negative capacitance independent gate Fin FET(NC-IG-Fin FET)device,by stacking the ferroelectric material Hf O₂ of a certain thickness into the front and back gate surfaces of the baseline independent gate Fin FET(IG-Fin FET)devices with symmetrical gate structure,and construct the TCAD simulation model and Hspice circuit simulation model for the new device we proposed.Compared with NC-Fin ET devices,the negative capacitance independent gate Fin FET device we proposed has the advantages of adjustable threshold voltage,more flexible circuit structure,and lower power supply voltage.The main innovations of this paper are as follows:1.We construct a negative capacitance independent gate Fin FET device with a symmetrical structure.With the switching current ratio,on-current and off-current as the optimization objectives,we optimized the gate work function,structure size and ferroelectric material parameters of the device we prorosed,and obtained new devices with good performance of low threshold negative capacitance independent gate Fin FET(NC-LT-IG-Fin FET)and high threshold negative capacitance independent gate Fin FET(NC-HT-IG-Fin FET).2.We conducted TCAD integral modeling and modular modeling for NC-LT-IG-Fin FET and NC-HT-IG-Fin FET devices.The intergral modeling is TCAD simulation modeling of its ferroelectric material and baseline IG-Fin FET device as a whole.In modular modeling,ferroelectric material and baseline IG-Fin FET device are divided into two modules for modeling,and then the integral modeling is carried out in a consistent solution.The baseline IG-Fin FET device use a TCAD 3D simulation model based on physical analysis and experimental test data for correction,while the ferroelectric material use L-K equation for modeling.3.We constructed Hspice circuit simulation model of the NC-IG-Fin FET device that provide a simulation basis for the subsequent research on the circuit application of NC-IG-Fin FET devices.The results of this research show that the NC-IG-Fin FET device we constructed has the advantages of adjustable threshold voltage and low operating voltage.The new NC-LT-IG-Fin FET and NC-HT-IG-Fin FET device constructed by optimizing parameters have a small sub-threshold swing and a large switching current ratio compared with the baseline IG-Fin FET device,which have significant advantages in reducing power consumption and have certain significance to the development of nano-devices.