Design And Implementation Of Hyperchaotic Chen Synchronous Encryption System Based On FPGA

The rapid development of communication technology and the rapid popularization of Internet technology improves the quality of people's life qualitatively.However,there are also increasing information security issues in pace with the development of information technology.The inherent randomness,unpredictability,and high sensitivity to initial values of chaotic signals makes the application of chaotic theory to the field of information security keep attracting much more attention.Simultaneously,the development of semiconductor technology followed closely,more and more scholars are engaged in the research of digital chaos synchronization and encryption technology.Throughout this paper,the four-dimensional hyperchaotic Chen system is taken as the research object.Based on chaos theory and FPGA technology,chaos synchronization,and the following image encryption and decryption are designed and implemented.In this paper,firstly,so as to minimize the degradation of the chaotic characteristics caused by the digital realization of the chaotic system,to shorten the register data path as much as possible,improving the overall operating speed of the system,the arithmetic architecture of the digital realization of hyperchaotic Chen system is designed based on FPGA.The hyperchaotic Chen signal generator module with a maximum operating frequency of 340 MHz is implemented in the xc7a100tfgg484-2 chips of the Artix-7 series produced by Xilinx.Secondly,a nonlinear feedback synchronization controller is designed to realize the high-speed hyperchaotic synchronization between two hyperchaotic Chen systems with the same structure.Then,for more complex chaotic systems in FPGA design and implementation,there will be multiple clock cycles to generate an effective chaotic sequence if we take the operating speed and accuracy into consideration.A multi-period pseudo-random sequence generator is designed in combination with the m sequence.and the generated pseudo-random sequence has passed the NIST test.On the whole,it not only improves the efficiency of encryption and decryption,but also enhances the pseudo-randomness of the chaotic sequence.Finally,the various functional modules designed above are integrated and perfected to complete the function such as the initial key reception by UART and network ports,the generation of chaotic sequences,the nonlinear feedback synchronization of chaotic systems,the generation of multi-period pseudo-random sequences,image encryption and decryption,and its display by HDMI.In the end,the design and implementation of FPGA-based hyperchaotic Chen synchronization encryption is achieved with certain application value.