Study On Hybrid Memory Space Layout Based On Global Memory Access Characteristics

Dynamic Random Access Memory(DRAM)can no longer meet the memory requirements of applications in the era of big data because the low storage density.Non-volatile Memory(NVM)has the advantages of low energy consumption,high storage density and support for byte addressing,etc.It is expected to alleviate the problem of memory development speed.In the hybrid memory architecture,the advantages of DRAM and NVM are used to write frequently read unpopular data to NVM,and at the same time load frequently written data into DRAM memory to improve the overall performance of the computer.However,through the analysis of the existing hybrid memory page management algorithm,the existing hybrid memory page management algorithm failed to properly initialize the hybrid memory based on the memory access characteristics,resulting in additional data page migration;the existing algorithm failed to identify the DRAM memory The future access characteristics of the page,which leads to the underutilization of the high-performance space of DRAM,thereby increasing the access delay of the program.In response to the above two issues,the main contributions of this article are as follows:In order to solve the problem of unreasonable memory space initialization,this thesis proposes a set of memory page initialization algorithms based on memory access characteristics.By collecting and analyzing the memory access records of the application,and when the page is initialized,the mixed memory is reasonably initialized according to the analysis results,thereby reducing mixing Memory page migration times.Aiming at the problem that the DRAM high-performance space is not fully utilized and the memory pages have invalid resident problems,this thesis proposes a set of memory page management algorithms combining active elimination and passive migration,including three parts: heat recognition mechanism,active elimination mechanism,and passive migration The heat recognition mechanism mainly recognizes the "temporary hot pages" and "dead pages" in the DRAM memory,and sorts the data pages in the DRAM according to the access heat.The active elimination mechanism writes the data pages identified as "temporary hot pages" and "dead pages" back to external storage;while the passive migration mechanism compares the DRAM heat when there are no "temporary hot pages" and "dead pages" in the DRAM.Lower pages are migrated to NVM to free up high-performance memory space.Active elimination and passive migration mechanisms are combined to give full play to the advantages of DRAM and NVM to maximize the overall performance of the computer.This thesis selects 10 classic workloads in SPEC CPU2006 to experiment and evaluate the above method.The results show that compared with the existing CLOCK-DWF,it can reduce the memory page migration by an average of 75% while ensuring the memory access latency;compared with UIMigrate,it can reduce the memory access latency by an average of 20% while ensuring the memory page migration.