The Research And Circuit Realization Of Millimeter Wave Radar Signal Processing Algorithm

With the continuous development of science and technology,automobile has become an important means for people to travel.However,traffic accidents happen frequently,and the safety problems of automobile need to be solved urgently.Vehicle mounted millimeter wave radar system can detect the target information to make response,so as to avoid traffic accidents.As the related technologies of vehicle borne MMW radar are basically monopolized by foreign companies,it is necessary to carry out research on MMW radar.In this paper,the signal processing algorithm of millimeter wave radar is studied and implemented.Based on sawtooth radar system,this paper studies the signal processing algorithm of sawtooth radar system.Firstly,a two-dimensional FFT algorithm is proposed to separate the range information and velocity information of the target.Then a CFAR detection algorithm is proposed based on the superimposed noise in the radar echo signal,which improves the detection probability of the target.Finally,a peak retrieval algorithm is proposed based on the extraction of target information.After that,the validity of the algorithm is verified based on MATLAB platform.According to the analysis of the simulation results,it is determined that the number of distance dimension FFT points in the algorithm is 512,the number of speed dimension FFT points is 128,the detection probability of the target is 99.4%,the distance error rate of the target detection is 0.84%,and the speed error rate of the target detection is 2.3%.Compared with other literature,it is found that the detection probability,distance error rate and speed error rate in this paper are better.Finally,the algorithm is accelerated in hardware,and the hardware circuit is designed based on the software part and the function simulation is carried out to verify the correct function of the circuit.Then the performance of FPGA is analyzed and verified.Based on the technology of SMIC 180 nm,the circuit designed in this paper is implemented in ASIC and the performance is analyzed.