Font Size: a A A

Research And FPGA Implementation Of Turbo Channel Coding

Posted on:2019-07-27Degree:MasterType:Thesis
Country:ChinaCandidate:L L LiuFull Text:PDF
GTID:2518306047978739Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Communication system has been developed for several generations,from the cellular system?And today,5G communication technology has become the research hotspot.As a method of channel coding,Turbo is a standard for 3 G mobile communications and a hot candidate for 5G mobile communication standards,because the performance is close to the Shannon limit.Turbo coding is also widely used in the field of channel estimation,channel equalization,signal detection,encryption technology and image processing.In this research,the basic principle of Turbo coding and decoding is introduced in detail,the component codes,interleaver and coding structure,iterative decoding structure and iterative stopping criterion were discussed respectively,and the MAP class decoding algorithm was deduced in detail.Based on Turbo code theory,using LOG-MAP decoding algorithm,BPSK modulation,and 5 times of Iteration,the code rate,sequence length and channel signal-to-noise ratio,those three factors affecting the error rate performance of Turbo code were simulated and demonstrated on the MATLAB platform.The conclusion was that the lower the code rate,the longer the length of the sequence,the higher the signal to noise ratio of the channel,the lower the bit error rate of the Turbo code.The decoding process was improved from the perspective of cross entropy and mutual information,and a new method of adaptive proportional factor was proposed.Through the simulation test,the best combination of scale factors was obtained.According to the new decoding scheme,the three factors affecting the bit error rate were resimulated.The conclusion was that when the new adaptive scaling factor was adopted,the principles of the error rate of Turbo codes affected by the three factors were same as former,and the improvement made by this paper will not affect the stability and convergence of Turbo decoding structure.The error rate performance of the Turbo code before and after the improvement was compared,through the simulation analysis,the conclusion was drawn that the error rate performance of Turbo code was effectively improved by using the improved decoding scheme in this paper.In the integrated environment of vivado,the verilogHDL hardware description language was used to complete the FPGA design of each module in the Turbo encoding and decoding structure,and each module was simulated on the simulation platform.After verification,when the sequence length was 7,the coding rate was 1/3,and the decoding algorithm was MAXLOG-MAP algorithm,the functions of each module in Turbo encoding and decoding structure was completed correctly in this paper.
Keywords/Search Tags:Turbo, channel coding, bit error rate, adaptive ratio factor, FPGA
PDF Full Text Request
Related items