Design Of USB＿PD Protocol Physical Layer Base On TYPE＿C

Since the outbreak of third industrial revolution,electronic product with lithium battery has covered all areas of people’s lives.Major manufacturers not only espend battery capacity,but also try fast charging protocols to make electronic product support high efficient charging method.Among those fast charging protocols,Universal Serial Bus Power Delivery 3.0 has a widely market application because USB＿PD 3.0 is compatible with various fast charging protocols.But BMC encoder,CRC check and low power consumption are the most important and difficult parts in USB＿PD 3.0 design.Those following contents are studies in this design of USB＿PD 3.0 protocol physical layer base on Type＿C.Firstly,BMC encoding rules of USB＿PD 3.0 fast charging protocol are studied,and then BMC encoding and decoding solutions are achieved to solve BMC encoding problems;secondly,USB＿PD 3.0 fast charging protocol with low power consumption is studied,and the method of inserting gated clock is proposed to reduce the dynamic power consumption of the whole protocol digital power controllers;and cyclic redundancy check algorithm in USB＿PD 3.0 fast charging protocol is studied,and the CRC32 time-sharing check circuit is proposed to reduce the area of algorithm circuit.Sencondly,the physical layer structure of the USB＿PD 3.0 fast charging protocol is studied,and completed physical layers of transceiver and receiver are degined to realize full duplex function of the protocol chip.Finally,board-level physical testing is carried out based on the FieldProgrammable Gate Array platform.According to test results,USB＿PD 3.0 protocol physical layer can correctly encode and decode the protocol data,as well as output voltage in 5 V,9 V,15 V and 20 V through a variable DC/DC circuit.The 0.18μm BCD process is used to design the back-end of the digital circuit,and the overall circuit scale is about 100,000 gates,and the dynamic power consumption of the circuit is 2546 μW and meets all design objectives.