Development Of Test System For Communication Link Of Transponder Based On PXIe

Communication link test is an important part of transponder integrated test,which is of great significance to ensure the correctness of transponder design and improve the reliability of its flight mission.The core of communication link test is to require the test system to generate the uplink signal and analyze the downlink signal of the transponder in real time.According to the above requirements,this project develops a test system of Balise communication link based on PXIe bus.FPGA is used to realize the local real-time processing of wireless communication signal,which provides a complete environment for the comprehensive test of Balise.According to the requirements of a transponder uplink and downlink communication link protocol,this paper proposes the overall scheme of communication link test system based on PXIe bus.PXIe motherboard and FMC daughter board are used to transmit and receive the uplink and downlink signals.FPGA is used to realize the high-speed processing of communication signal algorithm to improve the real-time performance of signal demodulation and decoding.The communication link of a certain type of transponder is divided into two parts: the uplink transmission link and the downlink receiving link.The uplink transmission link includes the functions of applying CCSDS standard LDPC channel coding and MSK modulation signal generation,The downlink receiving link includes MSK signal demodulation,LDPC channel decoding and other functions.This project focuses on the FPGA design method of LDPC decoder based on the modified minimum sum decoding algorithm,gives the selection method of the key parameters such as the modified parameters and the maximum number of iterations in the algorithm,designs and implements the FPGA oriented parallel encoder and decoder structure,and completes the design of the check node update module and the variable node update module;In addition,this project focuses on the FPGA implementation of MSK modem,and completes the design of MSK modulator based on parallel NCO,square loop coherent demodulation algorithm based on PLL technology,FPGA parallel structure design of square loop coherent demodulation algorithm and other key technologies,and comprehensively runs parallel mixing and multi-channel selection methods,High speed receiving and demodulation of downlink data are completed.Finally,the function of the transmitter link and the receiver link of the corresponding answering machine communication link test system is verified,and the joint debugging of the system is completed,and the communication error rate test is carried out.The experimental data show that the system can complete the test of transponder communication link reliably and effectively.